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Statements

Subject Item

n2:RIV%2F46747885%3A24220%2F14%3A%230003131%21RIV15-MSM-24220___

rdf:type

skos:Concept n14:Vysledek

rdfs:seeAlso

https://belas2014.informatik.tu-cottbus.de/index.php?Id=phdprogram

dcterms:description

This paper is about reconfigurable system on Xilinx FPGA with low memory requirements for partial bitstreams storing. This paper is about reconfigurable system on Xilinx FPGA with low memory requirements for partial bitstreams storing.

dcterms:title

Reconfigurable system on Xilinx FPGA with low memory requirements for partial bitstreams storing. Reconfigurable system on Xilinx FPGA with low memory requirements for partial bitstreams storing.

skos:prefLabel

Reconfigurable system on Xilinx FPGA with low memory requirements for partial bitstreams storing. Reconfigurable system on Xilinx FPGA with low memory requirements for partial bitstreams storing.

skos:notation

RIV/46747885:24220/14:#0003131!RIV15-MSM-24220___

n3:aktivita

n10:S n10:P

n3:aktivity

P(LD13019), S

n3:dodaniDat

n15:2015

n3:domaciTvurceVysledku

n11:5151600

n3:druhVysledku

n9:O

n3:duvernostUdaju

n18:S

n3:entitaPredkladatele

n13:predkladatel

n3:idSjednocenehoVysledku

41622

n3:idVysledku

RIV/46747885:24220/14:#0003131

n3:jazykVysledku

n4:eng

n3:klicovaSlova

Reconfigurable System

n3:klicoveSlovo

n5:Reconfigurable%20System

n3:kontrolniKodProRIV

[056CAFFC8548]

n3:obor

n12:JC

n3:pocetDomacichTvurcuVysledku

1

n3:pocetTvurcuVysledku

1

n3:projekt

n7:LD13019

n3:rokUplatneniVysledku

n15:2014

n3:tvurceVysledku

Drahoňovský, Tomáš

n17:organizacniJednotka

24220