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Statements

Subject Item
n2:RIV%2F00216305%3A26230%2F13%3APU106392%21RIV14-MV0-26230___
rdf:type
skos:Concept n6:Vysledek
dcterms:description
Recently introduced chips with ARM based processors and programmable logic provide huge potential for digital signal processing, networking and other applications. Many IP cores and operating systems have been prepared for these chips to simplify the development process. Nevertheless, the integration of IP cores and operating system is not covered by any development tool yet. Developers have to design, implement and debug the communication between hardware and software part of the application. Therefore we propose Reconfigurable System on Chip (RSoC) Framework to support rapid prototyping of applications running on FPGA chips with a processor. The framework consists of FPGA logic and OS drivers to support communication between application core in the FPGA and application software on the host processor. Moreover, the framework allows to configure automatically address space of components in the FPGA and supports dynamic loading of drivers according to the FPGA configuration. The developer c Recently introduced chips with ARM based processors and programmable logic provide huge potential for digital signal processing, networking and other applications. Many IP cores and operating systems have been prepared for these chips to simplify the development process. Nevertheless, the integration of IP cores and operating system is not covered by any development tool yet. Developers have to design, implement and debug the communication between hardware and software part of the application. Therefore we propose Reconfigurable System on Chip (RSoC) Framework to support rapid prototyping of applications running on FPGA chips with a processor. The framework consists of FPGA logic and OS drivers to support communication between application core in the FPGA and application software on the host processor. Moreover, the framework allows to configure automatically address space of components in the FPGA and supports dynamic loading of drivers according to the FPGA configuration. The developer c
dcterms:title
Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip
skos:prefLabel
Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip Framework for Fast Prototyping of Applications running on Reconfigurable Systems on Chip
skos:notation
RIV/00216305:26230/13:PU106392!RIV14-MV0-26230___
n6:predkladatel
n7:orjk%3A26230
n3:aktivita
n11:P
n3:aktivity
P(VG20102015022)
n3:dodaniDat
n20:2014
n3:domaciTvurceVysledku
n16:1105000 n16:9452591 n16:3991385 Korček, Pavol
n3:druhVysledku
n14:D
n3:duvernostUdaju
n21:S
n3:entitaPredkladatele
n18:predkladatel
n3:idSjednocenehoVysledku
75664
n3:idVysledku
RIV/00216305:26230/13:PU106392
n3:jazykVysledku
n19:eng
n3:klicovaSlova
FPGA, ARM, SoC, framework, Linux
n3:klicoveSlovo
n8:FPGA n8:SoC n8:ARM n8:Linux n8:framework
n3:kontrolniKodProRIV
[41ECFD34F714]
n3:mistoKonaniAkce
Cagliari
n3:mistoVydani
Cagliari
n3:nazevZdroje
Proceedings of the 2013 Conference on Design & Architectures for Signal & Image Processing
n3:obor
n22:JC
n3:pocetDomacichTvurcuVysledku
4
n3:pocetTvurcuVysledku
4
n3:projekt
n4:VG20102015022
n3:rokUplatneniVysledku
n20:2013
n3:tvurceVysledku
Košař, Vlastimil Kořenek, Jan Viktorin, Jan Korček, Pavol
n3:typAkce
n10:WRD
n3:zahajeniAkce
2013-10-08+02:00
s:numberOfPages
2
n15:hasPublisher
European Electronic Chips & Systems design Initiative
n12:isbn
979-10-92279-01-6
n17:organizacniJednotka
26230