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Statements

Subject Item
n2:RIV%2F00216305%3A26230%2F12%3APU98219%21RIV13-GA0-26230___
rdf:type
n5:Vysledek skos:Concept
dcterms:description
The fundamental aspect behind this paper is focused on behaviour of polymorphic digital circuits in potentially harsh operating environment. Unlike conventional CMOS-based circuits, the area of polymorphic electronics takes and an advantage of inherently built-in features that open up the possibility for on-the-fly adjustment of a particular circuit function with respect to the surrounding environment. The most prevalent benefit here is connected with the fact that space-efficient circuit implementation can be achieved due to the adoption of polymorphic principles and, thus, eliminate the need for an additional function change controller. From a conceptual point of view, key attention is given to a set of experiments which were conducted with the aim to evaluate the influence of wide temperature range (with special interest in low temperatures domain) in case of reconfigurable chip with dedicated polymorphic gates. The experimental setup was based around reconfigurable polymorphic chip REP The fundamental aspect behind this paper is focused on behaviour of polymorphic digital circuits in potentially harsh operating environment. Unlike conventional CMOS-based circuits, the area of polymorphic electronics takes and an advantage of inherently built-in features that open up the possibility for on-the-fly adjustment of a particular circuit function with respect to the surrounding environment. The most prevalent benefit here is connected with the fact that space-efficient circuit implementation can be achieved due to the adoption of polymorphic principles and, thus, eliminate the need for an additional function change controller. From a conceptual point of view, key attention is given to a set of experiments which were conducted with the aim to evaluate the influence of wide temperature range (with special interest in low temperatures domain) in case of reconfigurable chip with dedicated polymorphic gates. The experimental setup was based around reconfigurable polymorphic chip REP
dcterms:title
NAND/NOR Gate Polymorphism in Low Temperature Environment NAND/NOR Gate Polymorphism in Low Temperature Environment
skos:prefLabel
NAND/NOR Gate Polymorphism in Low Temperature Environment NAND/NOR Gate Polymorphism in Low Temperature Environment
skos:notation
RIV/00216305:26230/12:PU98219!RIV13-GA0-26230___
n5:predkladatel
n20:orjk%3A26230
n3:aktivita
n13:S n13:P n13:Z
n3:aktivity
P(ED1.1.00/02.0070), P(GAP103/10/1517), S, Z(MSM0021630528)
n3:dodaniDat
n14:2013
n3:domaciTvurceVysledku
n6:3760707 n6:4633695
n3:druhVysledku
n16:D
n3:duvernostUdaju
n4:S
n3:entitaPredkladatele
n7:predkladatel
n3:idSjednocenehoVysledku
152895
n3:idVysledku
RIV/00216305:26230/12:PU98219
n3:jazykVysledku
n15:eng
n3:klicovaSlova
Polymorphic electronics, temperature-awareness, polymorphic gate, multifunctional gate
n3:klicoveSlovo
n8:polymorphic%20gate n8:temperature-awareness n8:Polymorphic%20electronics n8:multifunctional%20gate
n3:kontrolniKodProRIV
[47A520913A99]
n3:mistoKonaniAkce
Tallinn
n3:mistoVydani
Tallinn
n3:nazevZdroje
Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems
n3:obor
n21:JC
n3:pocetDomacichTvurcuVysledku
2
n3:pocetTvurcuVysledku
2
n3:projekt
n9:ED1.1.00%2F02.0070 n9:GAP103%2F10%2F1517
n3:rokUplatneniVysledku
n14:2012
n3:tvurceVysledku
Růžička, Richard Šimek, Václav
n3:typAkce
n11:WRD
n3:zahajeniAkce
2012-04-18+02:00
n3:zamer
n18:MSM0021630528
s:numberOfPages
4
n23:hasPublisher
Institute of Electrical and Electronics Engineers
n17:isbn
978-1-4673-1185-4
n19:organizacniJednotka
26230