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Statements

Subject Item
n2:RIV%2F00216305%3A26230%2F10%3APU89605%21RIV14-GA0-26230___
rdf:type
skos:Concept n18:Vysledek
dcterms:description
The work reported in this paper describes the steps given towards an FPGA-based implementation of evolvable wavelet transforms for image compression in embedded systems. An Evolutionary Algorithm (EA) for the design and optimization of the transform coefficients is tailored for a suitable System on Chip implementation. Several cut downs on the computing requirements have been done to the original algorithm, adapting it for the FPGA implementation. What this paper addresses more specifically is the validation of the algorithm using fixed point arithmetic for the whole optimization process. The results show how high quality transforms are evolved from scratch with limited precision arithmetic. Also, preliminary results of the implementation in an FPGA device are included. The work reported in this paper describes the steps given towards an FPGA-based implementation of evolvable wavelet transforms for image compression in embedded systems. An Evolutionary Algorithm (EA) for the design and optimization of the transform coefficients is tailored for a suitable System on Chip implementation. Several cut downs on the computing requirements have been done to the original algorithm, adapting it for the FPGA implementation. What this paper addresses more specifically is the validation of the algorithm using fixed point arithmetic for the whole optimization process. The results show how high quality transforms are evolved from scratch with limited precision arithmetic. Also, preliminary results of the implementation in an FPGA device are included.
dcterms:title
High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs
skos:prefLabel
High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transforms in FPGAs
skos:notation
RIV/00216305:26230/10:PU89605!RIV14-GA0-26230___
n3:aktivita
n14:P n14:Z
n3:aktivity
P(GAP103/10/1517), Z(MSM0021630528)
n3:dodaniDat
n16:2014
n3:domaciTvurceVysledku
n7:7173873
n3:druhVysledku
n12:D
n3:duvernostUdaju
n20:S
n3:entitaPredkladatele
n21:predkladatel
n3:idSjednocenehoVysledku
261509
n3:idVysledku
RIV/00216305:26230/10:PU89605
n3:jazykVysledku
n8:eng
n3:klicovaSlova
FPGA, evolution strategy, image compression, wavelet transform, embedded system
n3:klicoveSlovo
n4:image%20compression n4:wavelet%20transform n4:FPGA n4:evolution%20strategy n4:embedded%20system
n3:kontrolniKodProRIV
[FED5DCC801D5]
n3:mistoKonaniAkce
Lille
n3:mistoVydani
Los Alamitos
n3:nazevZdroje
Proc. of 13th Euromicro Conference on Digital System Design
n3:obor
n19:IN
n3:pocetDomacichTvurcuVysledku
1
n3:pocetTvurcuVysledku
4
n3:projekt
n6:GAP103%2F10%2F1517
n3:rokUplatneniVysledku
n16:2010
n3:tvurceVysledku
Salvador, Ruben Sekanina, Lukáš Riesgo, Teresa Moreno, Felix
n3:typAkce
n17:WRD
n3:zahajeniAkce
2010-09-01+02:00
n3:zamer
n15:MSM0021630528
s:numberOfPages
8
n13:hasPublisher
IEEE Computer Society
n11:isbn
978-0-7695-4171-6
n10:organizacniJednotka
26230