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Namespace Prefixes

PrefixIRI
n14http://linked.opendata.cz/ontology/domain/vavai/riv/typAkce/
dctermshttp://purl.org/dc/terms/
n19http://purl.org/net/nknouf/ns/bibtex#
n6http://localhost/temp/predkladatel/
n9http://linked.opendata.cz/resource/domain/vavai/riv/tvurce/
n15http://linked.opendata.cz/ontology/domain/vavai/
n13https://schema.org/
n10http://linked.opendata.cz/resource/domain/vavai/zamer/
shttp://schema.org/
skoshttp://www.w3.org/2004/02/skos/core#
n3http://linked.opendata.cz/ontology/domain/vavai/riv/
n18http://linked.opendata.cz/resource/domain/vavai/vysledek/RIV%2F00216305%3A26230%2F09%3APU82663%21RIV10-MSM-26230___/
n2http://linked.opendata.cz/resource/domain/vavai/vysledek/
rdfhttp://www.w3.org/1999/02/22-rdf-syntax-ns#
n8http://linked.opendata.cz/ontology/domain/vavai/riv/klicoveSlovo/
n17http://linked.opendata.cz/ontology/domain/vavai/riv/duvernostUdaju/
xsdhhttp://www.w3.org/2001/XMLSchema#
n20http://linked.opendata.cz/ontology/domain/vavai/riv/aktivita/
n11http://linked.opendata.cz/ontology/domain/vavai/riv/jazykVysledku/
n21http://linked.opendata.cz/ontology/domain/vavai/riv/obor/
n12http://linked.opendata.cz/ontology/domain/vavai/riv/druhVysledku/
n4http://reference.data.gov.uk/id/gregorian-year/

Statements

Subject Item
n2:RIV%2F00216305%3A26230%2F09%3APU82663%21RIV10-MSM-26230___
rdf:type
n15:Vysledek skos:Concept
dcterms:description
In the paper, it is shown how testability analysis can be utilized both to modify digital data path in order to maximally enhance its testability at minimal costs and to offer information applicable during automated synthesis of a controller used to apply a test to the modified data path.  Our method takes a circuit structure described by means of a net-list as an input. The net-list contains information about how instances of particular module types defined in component libraries are interconnected by means of their interfaces. In both the library and net-list, module types belonging to various description levels (gate, register-transfer, system-on-a-chip etc.) can be placed in order to model multilevel or mixed designs. At the output of the method, modified data path and corresponding controller are produced. In the paper, it is shown how testability analysis can be utilized both to modify digital data path in order to maximally enhance its testability at minimal costs and to offer information applicable during automated synthesis of a controller used to apply a test to the modified data path.  Our method takes a circuit structure described by means of a net-list as an input. The net-list contains information about how instances of particular module types defined in component libraries are interconnected by means of their interfaces. In both the library and net-list, module types belonging to various description levels (gate, register-transfer, system-on-a-chip etc.) can be placed in order to model multilevel or mixed designs. At the output of the method, modified data path and corresponding controller are produced.
dcterms:title
Testability Analysis Driven Data Path Modification And Controller Synthesis Testability Analysis Driven Data Path Modification And Controller Synthesis
skos:prefLabel
Testability Analysis Driven Data Path Modification And Controller Synthesis Testability Analysis Driven Data Path Modification And Controller Synthesis
skos:notation
RIV/00216305:26230/09:PU82663!RIV10-MSM-26230___
n3:aktivita
n20:Z
n3:aktivity
Z(MSM0021630528)
n3:dodaniDat
n4:2010
n3:domaciTvurceVysledku
n9:8821968 n9:3760707
n3:druhVysledku
n12:D
n3:duvernostUdaju
n17:S
n3:entitaPredkladatele
n18:predkladatel
n3:idSjednocenehoVysledku
345979
n3:idVysledku
RIV/00216305:26230/09:PU82663
n3:jazykVysledku
n11:eng
n3:klicovaSlova
controller, data path, digital circuit, modification, library, netlist, synthesis, test, testability analysis
n3:klicoveSlovo
n8:digital%20circuit n8:controller n8:library n8:synthesis n8:modification n8:data%20path n8:test n8:testability%20analysis n8:netlist
n3:kontrolniKodProRIV
[611F9FC015C4]
n3:mistoKonaniAkce
Brno
n3:mistoVydani
Brno
n3:nazevZdroje
Proceedings of 16th Electronic Devices and Systems IMAPS CS International Conference
n3:obor
n21:JC
n3:pocetDomacichTvurcuVysledku
2
n3:pocetTvurcuVysledku
2
n3:rokUplatneniVysledku
n4:2009
n3:tvurceVysledku
Strnadel, Josef Růžička, Richard
n3:typAkce
n14:WRD
n3:zahajeniAkce
2009-09-02+02:00
n3:zamer
n10:MSM0021630528
s:numberOfPages
6
n19:hasPublisher
Vysoké učení technické v Brně
n13:isbn
978-80-214-3933-7
n6:organizacniJednotka
26230