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Statements

Subject Item
n2:RIV%2F00216305%3A26230%2F05%3APU55742%21RIV10-GA0-26230___
rdf:type
n17:Vysledek skos:Concept
dcterms:description
This paper gives an introduction to the approach of verification of discrete timed hardware design. It roughly offers low-level verification hand in hand<br> with high-level verification (which is described in more detail). The main part of this paper takes an example of the top of view verification of the lookup processor as a part of the COMBO cards developed by Liberouter project. This paper gives an introduction to the approach of verification of discrete timed hardware design. It roughly offers low-level verification hand in hand<br> with high-level verification (which is described in more detail). The main part of this paper takes an example of the top of view verification of the lookup processor as a part of the COMBO cards developed by Liberouter project.
dcterms:title
Towards Hardware Verification Towards Hardware Verification
skos:prefLabel
Towards Hardware Verification Towards Hardware Verification
skos:notation
RIV/00216305:26230/05:PU55742!RIV10-GA0-26230___
n3:aktivita
n18:P
n3:aktivity
P(GA102/04/0780)
n3:dodaniDat
n4:2010
n3:domaciTvurceVysledku
n13:1458841
n3:druhVysledku
n5:D
n3:duvernostUdaju
n11:S
n3:entitaPredkladatele
n19:predkladatel
n3:idSjednocenehoVysledku
546963
n3:idVysledku
RIV/00216305:26230/05:PU55742
n3:jazykVysledku
n21:eng
n3:klicovaSlova
formal verification, hardware verification, abstract model verification, verification of implementation<br>
n3:klicoveSlovo
n6:formal%20verification n6:hardware%20verification n6:verification%20of%20implementation%3Cbr%3E n6:abstract%20model%20verification
n3:kontrolniKodProRIV
[770056D13C7B]
n3:mistoKonaniAkce
Brno
n3:mistoVydani
Brno
n3:nazevZdroje
Proceedings of the 11th Conference Student EEICT 2005
n3:obor
n9:JC
n3:pocetDomacichTvurcuVysledku
1
n3:pocetTvurcuVysledku
1
n3:projekt
n15:GA102%2F04%2F0780
n3:rokUplatneniVysledku
n4:2005
n3:tvurceVysledku
Smrčka, Aleš
n3:typAkce
n16:CST
n3:zahajeniAkce
2005-04-28+02:00
s:numberOfPages
5
n20:hasPublisher
Vysoké učení technické v Brně. Fakulta informačních technologií
n12:isbn
978-80-214-2890-4
n10:organizacniJednotka
26230