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Statements

Subject Item
n2:RIV%2F00216305%3A26220%2F06%3APU57967%21RIV08-GA0-26220___
rdf:type
skos:Concept n14:Vysledek
dcterms:description
This paper presents a novel architecture of highorder single-stage sigma-delta (Σ∆) converter for sensor measurement. The two-step quantization technique was utilized to design a novel architecture of Σ∆ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. The proposed architecture of switched-capacitor (SC) Σ∆ modulator was simulated with blocks containing nonidealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). This paper presents a novel architecture of highorder single-stage sigma-delta (Σ∆) converter for sensor measurement. The two-step quantization technique was utilized to design a novel architecture of Σ∆ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. The proposed architecture of switched-capacitor (SC) Σ∆ modulator was simulated with blocks containing nonidealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). Článek popisuje novou architekturu převodníku sigma-delta vyššího řádu pro senzorové měření. Převodník s dvoustupňovým kvantovacím procesem je využit jako vícebitový kvantovací obvod.Prezentována acrhitektura byla namodelována v prostředí Matlab Simulink.V modelu 16-bitového sigma-delta modulátoru jsou zahrnuty parazitní vlivy, které se u sigma-delta modulátorů objevují.
dcterms:title
MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process Model 16-bitového sigma-delta modulátoru s dvěma kroky kvantovacího procesu v Matlabu
skos:prefLabel
Model 16-bitového sigma-delta modulátoru s dvěma kroky kvantovacího procesu v Matlabu MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process MATLAB Model of 16-bit Switched-capacitor Sigma-delta Modulator with Two-step Quantization Process
skos:notation
RIV/00216305:26220/06:PU57967!RIV08-GA0-26220___
n3:strany
87-90
n3:aktivita
n6:P n6:Z
n3:aktivity
P(GA102/05/0869), P(GD102/03/H105), Z(MSM0021630503)
n3:dodaniDat
n10:2008
n3:domaciTvurceVysledku
n20:3071138
n3:druhVysledku
n19:D
n3:duvernostUdaju
n12:S
n3:entitaPredkladatele
n16:predkladatel
n3:idSjednocenehoVysledku
484415
n3:idVysledku
RIV/00216305:26220/06:PU57967
n3:jazykVysledku
n18:eng
n3:klicovaSlova
sigma-delta modulation, quantization
n3:klicoveSlovo
n7:sigma-delta%20modulation n7:quantization
n3:kontrolniKodProRIV
[2CE785F0A33A]
n3:mistoKonaniAkce
Marrakech
n3:mistoVydani
NEUVEDEN
n3:nazevZdroje
Second International Symposium on Communications, Control and Signal Processing, ISCCSP 2006
n3:obor
n17:JA
n3:pocetDomacichTvurcuVysledku
1
n3:pocetTvurcuVysledku
1
n3:projekt
n8:GD102%2F03%2FH105 n8:GA102%2F05%2F0869
n3:rokUplatneniVysledku
n10:2006
n3:tvurceVysledku
Fujcik, Lukáš
n3:typAkce
n5:WRD
n3:zahajeniAkce
2006-03-13+01:00
n3:zamer
n13:MSM0021630503
s:numberOfPages
4
n15:hasPublisher
Suvisoft Oy ltd., Finland
n11:isbn
2-908849-17-8
n21:organizacniJednotka
26220