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Statements

Subject Item
n2:RIV%2F00216305%3A26220%2F05%3APU53780%21RIV07-GA0-26220___
rdf:type
skos:Concept n16:Vysledek
dcterms:description
Tento článek popisuje kroky, které jsou nutné použít pro návrh decimačního filtru. Parametry decimačního filtru jsou odvozeny ze specifikace modulátoru sigma-delta. K návrhu decimačního filtru byly použity programy Matlab a MathCAD. Byly navrženy dvě verze decimačního filtru. První verze decimačního je určena pro programovatelné logické obvody a druhá verze je určena pro návrh na čip v technologii AMIS CMOS 0.7 µm. This paper describes steps involved in a new VHDL design of a decimation filter for a sigma-delta (Σ∆) modulator. Parameters of decimation filter are derived from the specifications of the overall Σ∆ modulator. Using Matlab and MathCAD tool it is possible to find the filter order, the required quantization level for the coefficients and their values. Finally, by analyzing the design, we can find an efficient way to implement the filter in hardware. This structure is designed in two versions using VHDL. The first version is programmed and tested on a FPGA chip. Then second version was created for Cadence software tool to implement into a chip in the AMIS CMOS 0.7 µm technology. This paper describes steps involved in a new VHDL design of a decimation filter for a sigma-delta (Σ∆) modulator. Parameters of decimation filter are derived from the specifications of the overall Σ∆ modulator. Using Matlab and MathCAD tool it is possible to find the filter order, the required quantization level for the coefficients and their values. Finally, by analyzing the design, we can find an efficient way to implement the filter in hardware. This structure is designed in two versions using VHDL. The first version is programmed and tested on a FPGA chip. Then second version was created for Cadence software tool to implement into a chip in the AMIS CMOS 0.7 µm technology.
dcterms:title
Návrh decimačního filtru pro novou architekturu modulátoru sigma-delta Design of decimation filter for novel Sigma-Delta modulator Design of decimation filter for novel Sigma-Delta modulator
skos:prefLabel
Design of decimation filter for novel Sigma-Delta modulator Návrh decimačního filtru pro novou architekturu modulátoru sigma-delta Design of decimation filter for novel Sigma-Delta modulator
skos:notation
RIV/00216305:26220/05:PU53780!RIV07-GA0-26220___
n3:strany
58-63
n3:aktivita
n6:Z n6:P
n3:aktivity
P(GA102/05/0869), P(GD102/03/H105), Z(MSM0021630503)
n3:dodaniDat
n12:2007
n3:domaciTvurceVysledku
n15:3071138 Mougel, Thibault
n3:druhVysledku
n14:D
n3:duvernostUdaju
n22:S
n3:entitaPredkladatele
n7:predkladatel
n3:idSjednocenehoVysledku
517385
n3:idVysledku
RIV/00216305:26220/05:PU53780
n3:jazykVysledku
n11:eng
n3:klicovaSlova
sigma-delta modulator, decimation filter
n3:klicoveSlovo
n17:sigma-delta%20modulator n17:decimation%20filter
n3:kontrolniKodProRIV
[5693BA735903]
n3:mistoKonaniAkce
Sozopol
n3:mistoVydani
Bulgaria
n3:nazevZdroje
THE FOURTEENT INTERNATIONAL SCIENTIFIC AND APPLIED SCIENCE CONFERENCE - ELECTRONICS ET'2005
n3:obor
n20:JA
n3:pocetDomacichTvurcuVysledku
2
n3:pocetTvurcuVysledku
2
n3:projekt
n19:GD102%2F03%2FH105 n19:GA102%2F05%2F0869
n3:rokUplatneniVysledku
n12:2005
n3:tvurceVysledku
Mougel, Thibault Fujcik, Lukáš
n3:typAkce
n4:WRD
n3:zahajeniAkce
2005-09-21+02:00
n3:zamer
n21:MSM0021630503
s:numberOfPages
6
n13:hasPublisher
Technical University of Sofia
n10:isbn
954-438-521-5
n18:organizacniJednotka
26220