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Statements

Subject Item
n2:RIV%2F00216305%3A26220%2F03%3APU34718%21RIV11-MSM-26220___
rdf:type
n3:Vysledek skos:Concept
dcterms:description
LFSR counters suitable for implementation in PLD and FPGA devices are reviewed. A simple modification of the basic LFSR counter connection is presented that allows to eliminate the lock-up states and to create counters with arbitrary cycle length. LFSR counters suitable for implementation in PLD and FPGA devices are reviewed. A simple modification of the basic LFSR counter connection is presented that allows to eliminate the lock-up states and to create counters with arbitrary cycle length.
dcterms:title
LFSR Counters with Arbitrary Cycle Length LFSR Counters with Arbitrary Cycle Length
skos:prefLabel
LFSR Counters with Arbitrary Cycle Length LFSR Counters with Arbitrary Cycle Length
skos:notation
RIV/00216305:26220/03:PU34718!RIV11-MSM-26220___
n5:aktivita
n8:V n8:Z
n5:aktivity
V, Z(MSM 262200011), Z(MSM 262200022)
n5:dodaniDat
n10:2011
n5:domaciTvurceVysledku
n11:8084556
n5:druhVysledku
n19:D
n5:duvernostUdaju
n9:S
n5:entitaPredkladatele
n6:predkladatel
n5:idSjednocenehoVysledku
613473
n5:idVysledku
RIV/00216305:26220/03:PU34718
n5:jazykVysledku
n17:eng
n5:klicovaSlova
LFSR counter, lock-up state, cycle length
n5:klicoveSlovo
n12:LFSR%20counter n12:lock-up%20state n12:cycle%20length
n5:kontrolniKodProRIV
[C15CC73FFFE5]
n5:mistoKonaniAkce
Brno
n5:mistoVydani
Brno
n5:nazevZdroje
Radioelektronika 2003, Conference Proceedings
n5:obor
n13:JA
n5:pocetDomacichTvurcuVysledku
1
n5:pocetTvurcuVysledku
1
n5:rokUplatneniVysledku
n10:2003
n5:tvurceVysledku
Kolouch, Jaromír
n5:typAkce
n20:WRD
n5:zahajeniAkce
2003-05-06+02:00
n5:zamer
n15:MSM%20262200011 n15:MSM%20262200022
s:numberOfPages
4
n7:hasPublisher
Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav radioelektroniky
n4:isbn
80-214-2383-8
n21:organizacniJednotka
26220