This HTML5 document contains 46 embedded RDF statements represented using HTML+Microdata notation.

The embedded RDF content will be recognized by any processor of HTML5 Microdata.

Namespace Prefixes

PrefixIRI
n22http://linked.opendata.cz/ontology/domain/vavai/riv/typAkce/
dctermshttp://purl.org/dc/terms/
n10http://purl.org/net/nknouf/ns/bibtex#
n7http://localhost/temp/predkladatel/
n13http://linked.opendata.cz/resource/domain/vavai/projekt/
n8http://linked.opendata.cz/resource/domain/vavai/riv/tvurce/
n18http://linked.opendata.cz/resource/domain/vavai/subjekt/
n16http://linked.opendata.cz/ontology/domain/vavai/
n11https://schema.org/
shttp://schema.org/
n9http://linked.opendata.cz/resource/domain/vavai/vysledek/RIV%2F00216224%3A14330%2F12%3A00057861%21RIV13-GA0-14330___/
skoshttp://www.w3.org/2004/02/skos/core#
n3http://linked.opendata.cz/ontology/domain/vavai/riv/
n2http://linked.opendata.cz/resource/domain/vavai/vysledek/
rdfhttp://www.w3.org/1999/02/22-rdf-syntax-ns#
n6http://linked.opendata.cz/ontology/domain/vavai/riv/klicoveSlovo/
n21http://linked.opendata.cz/ontology/domain/vavai/riv/duvernostUdaju/
xsdhhttp://www.w3.org/2001/XMLSchema#
n17http://linked.opendata.cz/ontology/domain/vavai/riv/aktivita/
n14http://linked.opendata.cz/ontology/domain/vavai/riv/jazykVysledku/
n19http://linked.opendata.cz/ontology/domain/vavai/riv/obor/
n12http://linked.opendata.cz/ontology/domain/vavai/riv/druhVysledku/
n4http://reference.data.gov.uk/id/gregorian-year/

Statements

Subject Item
n2:RIV%2F00216224%3A14330%2F12%3A00057861%21RIV13-GA0-14330___
rdf:type
n16:Vysledek skos:Concept
dcterms:description
Verification of embedded systems has become increasingly important in many industrial domains. Safety critical embedded systems, such as those developed in aerospace industry, are regularly subject to automated formal verification process. In this paper we extend our tool integration chain of parallel, explicit-state LTL model checker DIVINE and Matlab Simulink tool suit with an improved support of counterexample simulation. In particular, we show how to provide the verification engineer with a direct connection between the error discovered by the model checker and the simulation in Matlab Simulink. This work has been conducted within the Artemis project industrial Framework for Embedded Systems Tools (iFEST). Verification of embedded systems has become increasingly important in many industrial domains. Safety critical embedded systems, such as those developed in aerospace industry, are regularly subject to automated formal verification process. In this paper we extend our tool integration chain of parallel, explicit-state LTL model checker DIVINE and Matlab Simulink tool suit with an improved support of counterexample simulation. In particular, we show how to provide the verification engineer with a direct connection between the error discovered by the model checker and the simulation in Matlab Simulink. This work has been conducted within the Artemis project industrial Framework for Embedded Systems Tools (iFEST).
dcterms:title
Executing Model Checking Counterexamples in Simulink Executing Model Checking Counterexamples in Simulink
skos:prefLabel
Executing Model Checking Counterexamples in Simulink Executing Model Checking Counterexamples in Simulink
skos:notation
RIV/00216224:14330/12:00057861!RIV13-GA0-14330___
n16:predkladatel
n18:orjk%3A14330
n3:aktivita
n17:P
n3:aktivity
P(GAP202/11/0312)
n3:dodaniDat
n4:2013
n3:domaciTvurceVysledku
n8:5692792 n8:6500773
n3:druhVysledku
n12:D
n3:duvernostUdaju
n21:S
n3:entitaPredkladatele
n9:predkladatel
n3:idSjednocenehoVysledku
135437
n3:idVysledku
RIV/00216224:14330/12:00057861
n3:jazykVysledku
n14:eng
n3:klicovaSlova
LTL Model Checking; Simulink; Embedded Systems; DiVinE
n3:klicoveSlovo
n6:Simulink n6:DiVinE n6:LTL%20Model%20Checking n6:Embedded%20Systems
n3:kontrolniKodProRIV
[22C26730F1F6]
n3:mistoKonaniAkce
Beijing, China
n3:mistoVydani
Neuveden
n3:nazevZdroje
IEEE Sixth International Symposium on Theoretical Aspects of Software Engineering
n3:obor
n19:IN
n3:pocetDomacichTvurcuVysledku
2
n3:pocetTvurcuVysledku
5
n3:projekt
n13:GAP202%2F11%2F0312
n3:rokUplatneniVysledku
n4:2012
n3:tvurceVysledku
Kratochvíla, Tomáš Brim, Luboš Barnat, Jiří de Oliveira, Italo Romani Beran, Jan
n3:typAkce
n22:WRD
n3:zahajeniAkce
2012-07-04+02:00
s:numberOfPages
4
n10:hasPublisher
IEEE Computer Society
n11:isbn
9780769547510
n7:organizacniJednotka
14330