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Statements

Subject Item
n2:RIV%2F00216224%3A14330%2F10%3A00065778%21RIV14-MSM-14330___
rdf:type
skos:Concept n15:Vysledek
dcterms:description
Recent development in computer hardware has brought more wide-spread emergence of shared memory, multi-core systems. These architectures offer opportunities to speed up various tasks - model checking and reachability analysis among others. In this paper, we present a design for a parallel shared memory LTL model checker that is based on a distributed memory algorithm. To improve the scalability of our tool, we have devised a number of implementation techniques which we present in this paper. We also report on a number of experi- ments we conoducted to analyze the behaviour of our tool under different conditions using various models. We demonstrate that our tool exhibits significant speedup in comparison to sequential tools, which improves the workflow of verification in general. Recent development in computer hardware has brought more wide-spread emergence of shared memory, multi-core systems. These architectures offer opportunities to speed up various tasks - model checking and reachability analysis among others. In this paper, we present a design for a parallel shared memory LTL model checker that is based on a distributed memory algorithm. To improve the scalability of our tool, we have devised a number of implementation techniques which we present in this paper. We also report on a number of experi- ments we conoducted to analyze the behaviour of our tool under different conditions using various models. We demonstrate that our tool exhibits significant speedup in comparison to sequential tools, which improves the workflow of verification in general.
dcterms:title
Scalable shared memory LTL model checking Scalable shared memory LTL model checking
skos:prefLabel
Scalable shared memory LTL model checking Scalable shared memory LTL model checking
skos:notation
RIV/00216224:14330/10:00065778!RIV14-MSM-14330___
n3:aktivita
n8:S n8:P n8:Z
n3:aktivity
P(1ET408050503), P(1M0545), P(GA201/09/1389), P(GP201/09/P497), S, Z(MSM0021622419)
n3:cisloPeriodika
2
n3:dodaniDat
n11:2014
n3:domaciTvurceVysledku
n4:1292358 n4:6500773 n4:5692792
n3:druhVysledku
n9:J
n3:duvernostUdaju
n12:S
n3:entitaPredkladatele
n16:predkladatel
n3:idSjednocenehoVysledku
286416
n3:idVysledku
RIV/00216224:14330/10:00065778
n3:jazykVysledku
n5:eng
n3:klicovaSlova
LTL Model Cecking; Parallel; Shared-Memory
n3:klicoveSlovo
n7:Shared-Memory n7:Parallel n7:LTL%20Model%20Cecking
n3:kodStatuVydavatele
DE - Spolková republika Německo
n3:kontrolniKodProRIV
[23E2D26EBBE6]
n3:nazevZdroje
International Journal on Software Tools for Technology Transfer (STTT)
n3:obor
n17:IN
n3:pocetDomacichTvurcuVysledku
3
n3:pocetTvurcuVysledku
3
n3:projekt
n14:GP201%2F09%2FP497 n14:1ET408050503 n14:GA201%2F09%2F1389 n14:1M0545
n3:rokUplatneniVysledku
n11:2010
n3:svazekPeriodika
12
n3:tvurceVysledku
Brim, Luboš Ročkai, Petr Barnat, Jiří
n3:zamer
n20:MSM0021622419
s:issn
1433-2779
s:numberOfPages
15
n19:doi
10.1007/s10009-010-0136-z
n18:organizacniJednotka
14330