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Statements

Subject Item
n2:RIV%2F00216224%3A14330%2F06%3A00015335%21RIV10-GA0-14330___
rdf:type
n6:Vysledek skos:Concept
dcterms:description
Personal computers are known to be highly usable as internet routers. To overcome their throughput limitations, a hardware accelerator can be employed. For the purposes of packet classification in the accelerator, we investigate a way to combine routing, level 2 addressing, and packet filtering into a single lookup structure. This paper describes the first part of the process: a method to combine routing and level 2 addressing to a single lookup. A formal model of routing and level 2 addressing is presented and used to prove correctness of the method and its equivalence to operating system behaviour. Personal computers are known to be highly usable as internet routers. To overcome their throughput limitations, a hardware accelerator can be employed. For the purposes of packet classification in the accelerator, we investigate a way to combine routing, level 2 addressing, and packet filtering into a single lookup structure. This paper describes the first part of the process: a method to combine routing and level 2 addressing to a single lookup. A formal model of routing and level 2 addressing is presented and used to prove correctness of the method and its equivalence to operating system behaviour.
dcterms:title
Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications
skos:prefLabel
Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications Routing and Level 2 Addressing in a Hardware Accelerator for Network Applications
skos:notation
RIV/00216224:14330/06:00015335!RIV10-GA0-14330___
n3:aktivita
n7:P n7:Z
n3:aktivity
P(1ET408050503), P(1M0545), P(GD102/05/H050), Z(MSM0021622419), Z(MSM6383917201)
n3:dodaniDat
n9:2010
n3:domaciTvurceVysledku
n20:8986371 n20:6712177
n3:druhVysledku
n14:D
n3:duvernostUdaju
n21:S
n3:entitaPredkladatele
n16:predkladatel
n3:idSjednocenehoVysledku
498018
n3:idVysledku
RIV/00216224:14330/06:00015335
n3:jazykVysledku
n12:eng
n3:klicovaSlova
routing; L2 addressing; hardware acceleration
n3:klicoveSlovo
n4:L2%20addressing n4:routing n4:hardware%20acceleration
n3:kontrolniKodProRIV
[D59BDB328632]
n3:mistoKonaniAkce
Funchal, Portugal
n3:mistoVydani
Funchal, Madeira
n3:nazevZdroje
ICT 2006, 13th International Conference on Telecommunications
n3:obor
n18:JD
n3:pocetDomacichTvurcuVysledku
2
n3:pocetTvurcuVysledku
2
n3:projekt
n8:1ET408050503 n8:GD102%2F05%2FH050 n8:1M0545
n3:rokUplatneniVysledku
n9:2006
n3:tvurceVysledku
Řehák, Vojtěch Antoš, David
n3:typAkce
n11:WRD
n3:zahajeniAkce
2005-05-08+02:00
n3:zamer
n5:MSM6383917201 n5:MSM0021622419
s:numberOfPages
4
n15:hasPublisher
University of Aveiro, Portugal
n19:isbn
972-98368-4-1
n22:organizacniJednotka
14330