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| Description
| - A novel test-per-clock built-in self-test (BIST) equipment design method for combinational or full-scan sequential circuits is proposed in this paper. Particularly, the test pattern generator is being designed. The method is based on similar principles as are well known test pattern generator design methods, like bit-fixing and bit-flipping. The novelty comprises in proposing a brand new algorithm to synthesize the test pattern generator. In principle, we synthesize a combinational block - the Decoder, transforming pseudo random code words into deterministic test patterns pre computed by an ATPG tool. The Column Matching algorithm to design the decoder is proposed. Here the maximum of output variables of the decoder is tried to be matched with the decoder inputs, yielding the outputs be implemented as mere wires, thus without any logic. No memory elements are needed to store the test patterns, which reduces the BIST area overhead.
- A novel test-per-clock built-in self-test (BIST) equipment design method for combinational or full-scan sequential circuits is proposed in this paper. Particularly, the test pattern generator is being designed. The method is based on similar principles as are well known test pattern generator design methods, like bit-fixing and bit-flipping. The novelty comprises in proposing a brand new algorithm to synthesize the test pattern generator. In principle, we synthesize a combinational block - the Decoder, transforming pseudo random code words into deterministic test patterns pre computed by an ATPG tool. The Column Matching algorithm to design the decoder is proposed. Here the maximum of output variables of the decoder is tried to be matched with the decoder inputs, yielding the outputs be implemented as mere wires, thus without any logic. No memory elements are needed to store the test patterns, which reduces the BIST area overhead. (en)
- A novel test-per-clock built-in self-test (BIST) equipment design method for combinational or full-scan sequential circuits is proposed in this paper. Particularly, the test pattern generator is being designed. The method is based on similar principles as are well known test pattern generator design methods, like bit-fixing and bit-flipping. The novelty comprises in proposing a brand new algorithm to synthesize the test pattern generator. In principle, we synthesize a combinational block - the Decoder, transforming pseudo random code words into deterministic test patterns pre computed by an ATPG tool. The Column Matching algorithm to design the decoder is proposed. Here the maximum of output variables of the decoder is tried to be matched with the decoder inputs, yielding the outputs be implemented as mere wires, thus without any logic. No memory elements are needed to store the test patterns, which reduces the BIST area overhead. (cs)
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| Title
| - Column-matching based mixed-mode test pattern generator design technique for BIST
- Column-matching based mixed-mode test pattern generator design technique for BIST (en)
- Column-matching based mixed-mode test pattern generator design technique for BIST (cs)
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| skos:prefLabel
| - Column-matching based mixed-mode test pattern generator design technique for BIST
- Column-matching based mixed-mode test pattern generator design technique for BIST (en)
- Column-matching based mixed-mode test pattern generator design technique for BIST (cs)
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| skos:notation
| - RIV/68407700:21230/08:03145792!RIV09-MSM-21230___
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| http://linked.open...avai/riv/aktivita
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| http://linked.open...avai/riv/aktivity
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| http://linked.open...iv/cisloPeriodika
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| http://linked.open...vai/riv/dodaniDat
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| http://linked.open...aciTvurceVysledku
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| http://linked.open.../riv/druhVysledku
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| http://linked.open...iv/duvernostUdaju
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| http://linked.open...titaPredkladatele
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| http://linked.open...dnocenehoVysledku
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| http://linked.open...ai/riv/idVysledku
| - RIV/68407700:21230/08:03145792
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| http://linked.open...riv/jazykVysledku
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| http://linked.open.../riv/klicovaSlova
| - Built-in self-test; Logic design; Mixed-mode testing; Test pattern generator; Weighted random pattern testing (en)
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| http://linked.open.../riv/klicoveSlovo
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| http://linked.open...odStatuVydavatele
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| http://linked.open...ontrolniKodProRIV
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| http://linked.open...i/riv/nazevZdroje
| - Microprocessors and Microsystems
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| http://linked.open...in/vavai/riv/obor
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| http://linked.open...ichTvurcuVysledku
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| http://linked.open...cetTvurcuVysledku
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| http://linked.open...UplatneniVysledku
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| http://linked.open...v/svazekPeriodika
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| http://linked.open...iv/tvurceVysledku
| - Kubátová, Hana
- Fišer, Petr
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| http://linked.open...ain/vavai/riv/wos
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| http://linked.open...n/vavai/riv/zamer
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| issn
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| number of pages
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| http://localhost/t...ganizacniJednotka
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| is http://linked.open...avai/riv/vysledek
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