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  • This paper presents an accelerated simulation of a Temporal Hebbian Self-organizing map (THSOM) neural network on x86 based platform. To reduce the time, our implementation utilizes all parallel features of modern x86 hardware - The data parallelism using the SIMD SSE instruction set and instruction parallelism utilizing multiple cores. The overall design of our THSOM implementation is modular, allowing us to re-implement specific parts of computations with different optimizations or parallel approaches yet still maintain good comparability between different optimizing combinations. We present the results of our measurements and influence of data parallel and instruction parallel processing compared to differently optimized versions. We also present an efficient method for frequent barrier synchronization of different threads.
  • This paper presents an accelerated simulation of a Temporal Hebbian Self-organizing map (THSOM) neural network on x86 based platform. To reduce the time, our implementation utilizes all parallel features of modern x86 hardware - The data parallelism using the SIMD SSE instruction set and instruction parallelism utilizing multiple cores. The overall design of our THSOM implementation is modular, allowing us to re-implement specific parts of computations with different optimizations or parallel approaches yet still maintain good comparability between different optimizing combinations. We present the results of our measurements and influence of data parallel and instruction parallel processing compared to differently optimized versions. We also present an efficient method for frequent barrier synchronization of different threads. (en)
Title
  • Hardware Acceleration for Computational Intelligence - THSOM Neural Network on x86 hardware
  • Hardware Acceleration for Computational Intelligence - THSOM Neural Network on x86 hardware (en)
skos:prefLabel
  • Hardware Acceleration for Computational Intelligence - THSOM Neural Network on x86 hardware
  • Hardware Acceleration for Computational Intelligence - THSOM Neural Network on x86 hardware (en)
skos:notation
  • RIV/68407700:21230/08:00146974!RIV10-MSM-21230___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • Z(MSM6840770012)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 369806
http://linked.open...ai/riv/idVysledku
  • RIV/68407700:21230/08:00146974
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • Neural Networks; Self-Organizing Maps; Computational Intelligence; Hardware Acceleration (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [A3F153EBDEC3]
http://linked.open...v/mistoKonaniAkce
  • Le Havre
http://linked.open...i/riv/mistoVydani
  • Ghent
http://linked.open...i/riv/nazevZdroje
  • European Simulation and Modelling Conference 2008
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Skrbek, Miroslav
  • Marek, Rudolf
http://linked.open...vavai/riv/typAkce
http://linked.open...ain/vavai/riv/wos
  • 000264749400048
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • EUROSIS - ETI
https://schema.org/isbn
  • 978-90-77381-44-1
http://localhost/t...ganizacniJednotka
  • 21230
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