About: Dynamic Reconfiguration in FPGA-based Designs

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Není k dispozici Není k dispozici (cs) This paper discusses architectural issues arising from the use of dynamic reconfiguration and shows a possible use of dynamic reconfiguration to extend and accelerate a computation performed in system-on-a-chip designs with microprocessors with fixed instruction sets. The implementation data for two dynamically reconfigurable platforms available on the market - the Xilinx Virtex2 family FPGAs and the Atmel FPSLIC family FPGAs - is compared in terms of resource requirements, operating frequency, and power consumption. (en)
Title	Dynamic Reconfiguration in FPGA-based Designs Dynamic Reconfiguration in FPGA-based Designs (en) Dynamic Reconfiguration in FPGA-based Designs (cs)
skos:prefLabel	Dynamic Reconfiguration in FPGA-based Designs Dynamic Reconfiguration in FPGA-based Designs (en) Dynamic Reconfiguration in FPGA-based Designs (cs)
skos:notation	RIV/68407700:21230/05:03111857!RIV06-MSM-21230___
http://linked.open.../vavai/riv/strany	129 ; 136
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(1M0567)
http://linked.open...vai/riv/dodaniDat	2006
http://linked.open...aciTvurceVysledku	Honzík, Petr Bartosinski, Roman
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta elektrotechnická
http://linked.open...dnocenehoVysledku	518925
http://linked.open...ai/riv/idVysledku	RIV/68407700:21230/05:03111857
http://linked.open...riv/jazykVysledku	cze - čeština
http://linked.open.../riv/klicovaSlova	Dynamic Reconfiguration; FPGA (en)
http://linked.open.../riv/klicoveSlovo	FPGA Dynamic Reconfiguration
http://linked.open...ontrolniKodProRIV	[19CF8F1A29EA]
http://linked.open...v/mistoKonaniAkce	Sopron
http://linked.open...i/riv/mistoVydani	Sopron
http://linked.open...i/riv/nazevZdroje	Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	4 (xsd:int)
http://linked.open...vavai/riv/projekt	Centre for Applied Cybernetics
http://linked.open...UplatneniVysledku	2005
http://linked.open...iv/tvurceVysledku	Bartosinski, Roman Honzík, Petr Matoušek, R. Daněk, M.
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2005-04-13 (xsd:date)
number of pages	8 (xsd:int)
http://purl.org/ne...btex#hasPublisher	University of Western Hungary
https://schema.org/isbn	963-9364-48-7
http://localhost/t...ganizacniJednotka	21230
is http://linked.open...avai/riv/vysledek of	Dynamic Reconfiguration in FPGA-based Designs

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