This application note describes parameters and use of an HW demonstrator, designed to demonstrate two floating point accelerator families designed in UTIA. Pre-installed system demonstrates use of four instances of bce_fp01_1x2_|0|1|2|3|_plbw_v1_40_a accelerator on PLB_v46 bus of the Xilinx MicroBlaze soft-core processor on Spartan 3a_dsp FPGA.
This application note describes parameters and use of an HW demonstrator, designed to demonstrate two floating point accelerator families designed in UTIA. Pre-installed system demonstrates use of four instances of bce_fp01_1x2_|0|1|2|3|_plbw_v1_40_a accelerator on PLB_v46 bus of the Xilinx MicroBlaze soft-core processor on Spartan 3a_dsp FPGA. (en)
Floating Point Accelerator Families bce_fp01_1x1_0_plbw_v1_|10|20|30|_a bce_fp01_1x2_0_plbw_v1_|10|20|30|40|_a for Xilinx Spartan3 DSP 1800 Board and Petalogix Petalinux-v0.40-final
Floating Point Accelerator Families bce_fp01_1x1_0_plbw_v1_|10|20|30|_a bce_fp01_1x2_0_plbw_v1_|10|20|30|40|_a for Xilinx Spartan3 DSP 1800 Board and Petalogix Petalinux-v0.40-final (en)
Floating Point Accelerator Families bce_fp01_1x1_0_plbw_v1_|10|20|30|_a bce_fp01_1x2_0_plbw_v1_|10|20|30|40|_a for Xilinx Spartan3 DSP 1800 Board and Petalogix Petalinux-v0.40-final
Floating Point Accelerator Families bce_fp01_1x1_0_plbw_v1_|10|20|30|_a bce_fp01_1x2_0_plbw_v1_|10|20|30|40|_a for Xilinx Spartan3 DSP 1800 Board and Petalogix Petalinux-v0.40-final (en)