About: Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final

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About: Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final Goto Sponge NotDistinct Permalink

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	This application note describes HW demonstrator of three floating point accelerators bce_fp01_1x1_0_plbw_v1_\|10\|20\|30\|_a. Accelerators are reconfigurable by change of firmware. Accelerators are compatible with PLB_v46 bus of Xilinx MicroBlaze soft-core processor on Spartan 3an FPGA. Demonstrator supports Ethernet point-to point connectivity and boot from on board parallel FLASH. A nonvolatile internal FLASH of the XC3S700AN-4FGG484C FPGA is used for the power-up initialization of the FPGA chip located on the Xilinx Spartan-3AN starter kit. This application note describes HW demonstrator of three floating point accelerators bce_fp01_1x1_0_plbw_v1_\|10\|20\|30\|_a. Accelerators are reconfigurable by change of firmware. Accelerators are compatible with PLB_v46 bus of Xilinx MicroBlaze soft-core processor on Spartan 3an FPGA. Demonstrator supports Ethernet point-to point connectivity and boot from on board parallel FLASH. A nonvolatile internal FLASH of the XC3S700AN-4FGG484C FPGA is used for the power-up initialization of the FPGA chip located on the Xilinx Spartan-3AN starter kit. (en)
Title	Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1\|10\|20\|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1\|10\|20\|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final (en)
skos:prefLabel	Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1\|10\|20\|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1\|10\|20\|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final (en)
skos:notation	RIV/67985556:_____/09:00331484!RIV10-MSM-67985556
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(1M0567), P(2C06008), Z(AV0Z10750506)
http://linked.open...vai/riv/dodaniDat	2010
http://linked.open...aciTvurceVysledku	Kadlec, Jiří
http://linked.open.../riv/druhVysledku	G/B - Funkční vzorek
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...onomickeParametry	Lokalizace vestaveného uCLinux operačního systému petalinux-v.40-final spoku s akceleratorem výpočtů v plovoucí řádové čárce na FPGA 3S700AN s cenou čipu pod 800 Kč/kus
http://linked.open...titaPredkladatele	Ústav teorie informace a automatizace AV ČR, v. v. i.
http://linked.open...dnocenehoVysledku	309421
http://linked.open...ai/riv/idVysledku	RIV/67985556:_____/09:00331484
http://linked.open...terniIdentifikace	bce_fp01_1x1_0_plbw...
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open...vai/riv/kategorie	A - Do 5 mil. Kč
http://linked.open.../riv/klicovaSlova	Nonvolatile Field Programable Gate Array; Embedded uCLinux; Floating point accelerator (en)
http://linked.open.../riv/klicoveSlovo	Embedded uCLinux Floating point accelerator Nonvolatile Field Programable Gate Array
http://linked.open...ontrolniKodProRIV	[1206E81FFAD5]
http://linked.open.../licencniPoplatek	A - Poskytovatel licence na výsledek požaduje licenční poplatek
http://linked.open...okalizaceVysledku	UTIA AV ČR, oddělení zpracování signálů, Praha 8
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	1 (xsd:int)
http://linked.open...cetTvurcuVysledku	1 (xsd:int)
http://linked.open...vavai/riv/projekt	Centre for Applied Cybernetics Virtual Laboratory of Microprocessor Technology Application
http://linked.open...UplatneniVysledku	2009
http://linked.open...echnickeParametry	Výpočet LMS Filtru 50MFLOPS při spotřebě 5mW/MFLOPS
http://linked.open...iv/tvurceVysledku	Kadlec, Jiří
http://linked.open...avai/riv/vlastnik	UTIA AV ČR, oddělení zpracování signálů, Praha 8
http://linked.open...itiJinymSubjektem	A - Nabytí licence je nutné vždy
http://linked.open...n/vavai/riv/zamer	Pokročilé matematické metody získávání, zpracování a využití informací a znalostí ve složitých a nedeterministických systémech
is http://linked.open...avai/riv/vysledek of	Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1\|10\|20\|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1\|10\|20\|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1\|10\|20\|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1\|10\|20\|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final

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