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Description
  • A high performance RLS lattice filter with evaluation of an unknown order of identified system was implemented as an accelerator for the Microblaze processor. The accelerator hardware can fully exploit parallelisms in the algorithm and remove load from a microprocessor. The optimal logarithmic number system implementation of the RLS lattice IP core was used. The solution makes possible evaluation of the RLS lattice filter of order 256 at 8 kHz sampling rate in the best case. The implementation outperforms software solution up to 74 times and it is also performing 40% faster than other known solutions.
  • A high performance RLS lattice filter with evaluation of an unknown order of identified system was implemented as an accelerator for the Microblaze processor. The accelerator hardware can fully exploit parallelisms in the algorithm and remove load from a microprocessor. The optimal logarithmic number system implementation of the RLS lattice IP core was used. The solution makes possible evaluation of the RLS lattice filter of order 256 at 8 kHz sampling rate in the best case. The implementation outperforms software solution up to 74 times and it is also performing 40% faster than other known solutions. (en)
Title
  • RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator
  • RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator (en)
skos:prefLabel
  • RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator
  • RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator (en)
skos:notation
  • RIV/67985556:_____/07:00085945!RIV10-MSM-67985556
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(1M0567), Z(AV0Z10750506)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 448044
http://linked.open...ai/riv/idVysledku
  • RIV/67985556:_____/07:00085945
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • DSP; adaptive filter; logarithmic arithmetic; embedded processor; FPGA (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [6745FBD2A996]
http://linked.open...v/mistoKonaniAkce
  • Amsterdam
http://linked.open...i/riv/mistoVydani
  • Delft
http://linked.open...i/riv/nazevZdroje
  • Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL)
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Pohl, Zdeněk
  • Tichý, Milan
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
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  • IEEE
https://schema.org/isbn
  • 978-1-4244-1059-0
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