About: Graphical Framework for Digital Systems Design

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	In this paper a framework design solution for digital systems design is presented. The framework uses the Simulink software as a standard design entry tool. The key role in the Framework design plays the netlist compiler, which is a stand-alone programm, created in C++. Although the Framework has been primary designated for general digital systems, presently it assumes to be used for creating the parallel systems with distributed memory and can be targetted to powerful FPGA devices. So the computing systems designed in the Framework are naturally synchronnous and the language finally used for describing the system is the VHDL. The Simulink software together with a designed netlist compiler constitutes an Integrated Development Environment (IDE). In this paper a framework design solution for digital systems design is presented. The framework uses the Simulink software as a standard design entry tool. The key role in the Framework design plays the netlist compiler, which is a stand-alone programm, created in C++. Although the Framework has been primary designated for general digital systems, presently it assumes to be used for creating the parallel systems with distributed memory and can be targetted to powerful FPGA devices. So the computing systems designed in the Framework are naturally synchronnous and the language finally used for describing the system is the VHDL. The Simulink software together with a designed netlist compiler constitutes an Integrated Development Environment (IDE). (en) In this paper a framework design solution for digital systems design is presented. The framework uses the Simulink software as a standard design entry tool. The key role in the Framework design plays the netlist compiler, which is a stand-alone programm, created in C++. Although the Framework has been primary designated for general digital systems, presently it assumes to be used for creating the parallel systems with distributed memory and can be targetted to powerful FPGA devices. So the computing systems designed in the Framework are naturally synchronnous and the language finally used for describing the system is the VHDL. The Simulink software together with a designed netlist compiler constitutes an Integrated Development Environment (IDE). (cs)
Title	Grafický framework pro návrh číslicových obvodů (cs) Graphical Framework for Digital Systems Design Graphical Framework for Digital Systems Design (en)
skos:prefLabel	Grafický framework pro návrh číslicových obvodů (cs) Graphical Framework for Digital Systems Design Graphical Framework for Digital Systems Design (en)
skos:notation	RIV/61989100:27240/04:00011331!RIV/2005/GA0/272405/N
http://linked.open.../vavai/riv/strany	181-184
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(GP102/02/P049)
http://linked.open...vai/riv/dodaniDat	2005
http://linked.open...aciTvurceVysledku	Kašík, Vladimír
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoká škola báňská - Technická univerzita Ostrava / Fakulta elektrotechniky a informatiky
http://linked.open...dnocenehoVysledku	565742
http://linked.open...ai/riv/idVysledku	RIV/61989100:27240/04:00011331
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	Programmable Logic Devices;Parallel Computation;FPGA;Logic design (en)
http://linked.open.../riv/klicoveSlovo	Parallel Computation FPGA Programmable Logic Devices Logic design
http://linked.open...ontrolniKodProRIV	[DB93EEF31801]
http://linked.open...v/mistoKonaniAkce	Brno, Česká republika
http://linked.open...i/riv/mistoVydani	Brno
http://linked.open...i/riv/nazevZdroje	11th Electronic Devices and Sysrems Conference 2004
http://linked.open...in/vavai/riv/obor	JD
http://linked.open...ichTvurcuVysledku	1 (xsd:int)
http://linked.open...cetTvurcuVysledku	1 (xsd:int)
http://linked.open...vavai/riv/projekt	Flexible graphical development system design and development for creating the VHDL-based applications
http://linked.open...UplatneniVysledku	2004
http://linked.open...iv/tvurceVysledku	Kašík, Vladimír
http://linked.open...vavai/riv/typAkce	EUR - Evropská
http://linked.open.../riv/zahajeniAkce	2004-09-09 (xsd:date)
number of pages	515 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Vysoké učení technické v Brně
https://schema.org/isbn	80-214-2701-9
http://localhost/t...ganizacniJednotka	27240

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