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  • Approximate circuits are digital circuits which are intentionally designed in such a way that the specification is not met in terms of functionality in order to obtain some improvements in power consumption, performance or area, in comparison with fully functional circuits. In this paper, we propose to design approximate circuits using evolutionary design techniques. In particular, different error metrics are utilized to assess the circuit functionality. The proposed method begins with a fully functional circuit which is then intentionally degraded by Cartesian genetic programming (CGP) to obtain a circuit with a predefined error. In the second phase, CGP is used to minimize the number of gates or another error criterion. The effect of various error metrics on the search performance, area and power consumption is evaluated in the task of multiplier design.
  • Approximate circuits are digital circuits which are intentionally designed in such a way that the specification is not met in terms of functionality in order to obtain some improvements in power consumption, performance or area, in comparison with fully functional circuits. In this paper, we propose to design approximate circuits using evolutionary design techniques. In particular, different error metrics are utilized to assess the circuit functionality. The proposed method begins with a fully functional circuit which is then intentionally degraded by Cartesian genetic programming (CGP) to obtain a circuit with a predefined error. In the second phase, CGP is used to minimize the number of gates or another error criterion. The effect of various error metrics on the search performance, area and power consumption is evaluated in the task of multiplier design. (en)
Title
  • Evolutionary Design of Approximate Multipliers Under Different Error Metrics
  • Evolutionary Design of Approximate Multipliers Under Different Error Metrics (en)
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  • Evolutionary Design of Approximate Multipliers Under Different Error Metrics
  • Evolutionary Design of Approximate Multipliers Under Different Error Metrics (en)
skos:notation
  • RIV/00216305:26230/14:PU111927!RIV15-MSM-26230___
http://linked.open...avai/riv/aktivita
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  • P(ED1.1.00/02.0070), P(GA14-04197S), S
http://linked.open...vai/riv/dodaniDat
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  • 15598
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  • RIV/00216305:26230/14:PU111927
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  • approximate circuit, multiplier, evolutionary design (en)
http://linked.open.../riv/klicoveSlovo
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  • [FAA836244BAB]
http://linked.open...v/mistoKonaniAkce
  • Warsaw
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  • Warsaw
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  • 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
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  • Sekanina, Lukáš
  • Vašíček, Zdeněk
http://linked.open...vavai/riv/typAkce
http://linked.open...ain/vavai/riv/wos
  • 000346734200027
http://linked.open.../riv/zahajeniAkce
number of pages
http://bibframe.org/vocab/doi
  • 10.1109/DDECS.2014.6868777
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  • IEEE Computer Society
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  • 978-1-4799-4558-0
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  • 26230
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