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Description
| - NetFPGA-1G has shown its potential in enabling fast traffic processing while introducing no packet loss and minimal delay. Now it is time to scale down in order to enable a massive deployment of the FPGA solutions in networking. We propose and build a low-cost and low-power platform which is be capable of hosting embedded applications with FPGA support. Such a platform might enable faster deployment of new ideas in networking and might prove useful for large-scale experiments (stacks of platforms) as its size, power consumption and cost are expected to be ten times lower of the NetFPGA-cube. It is recognized that the FPGA coupled with the host processor comprises a powerful platform for network traffic processing. The logic of such a solution is clear. Computational intensive tasks are handled by the FPGA logic whereas more complex tasks by the processor. The proposed platform aims at such a design in which the FPGA and the processor are even more tightly coupled together on a single die S
- NetFPGA-1G has shown its potential in enabling fast traffic processing while introducing no packet loss and minimal delay. Now it is time to scale down in order to enable a massive deployment of the FPGA solutions in networking. We propose and build a low-cost and low-power platform which is be capable of hosting embedded applications with FPGA support. Such a platform might enable faster deployment of new ideas in networking and might prove useful for large-scale experiments (stacks of platforms) as its size, power consumption and cost are expected to be ten times lower of the NetFPGA-cube. It is recognized that the FPGA coupled with the host processor comprises a powerful platform for network traffic processing. The logic of such a solution is clear. Computational intensive tasks are handled by the FPGA logic whereas more complex tasks by the processor. The proposed platform aims at such a design in which the FPGA and the processor are even more tightly coupled together on a single die S (en)
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Title
| - A New Embedded Platform for Rapid Development of Networking Applications
- A New Embedded Platform for Rapid Development of Networking Applications (en)
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skos:prefLabel
| - A New Embedded Platform for Rapid Development of Networking Applications
- A New Embedded Platform for Rapid Development of Networking Applications (en)
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skos:notation
| - RIV/00216305:26230/12:PU101849!RIV13-MSM-26230___
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http://linked.open...avai/predkladatel
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
| - P(ED1.1.00/02.0070), P(VG20102015022), S, Z(MSM0021630528)
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/00216305:26230/12:PU101849
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
| - FPGA, Zynq, Embedded, Networking (en)
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...v/mistoKonaniAkce
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http://linked.open...i/riv/mistoVydani
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http://linked.open...i/riv/nazevZdroje
| - Proceedings of the 2012 Seventh ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2012)
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...vavai/riv/projekt
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http://linked.open...UplatneniVysledku
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http://linked.open...iv/tvurceVysledku
| - Korček, Pavol
- Kořenek, Jan
- Žádník, Martin
- Košař, Vlastimil
- Viktorin, Jan
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http://linked.open...vavai/riv/typAkce
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http://linked.open.../riv/zahajeniAkce
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http://linked.open...n/vavai/riv/zamer
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number of pages
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http://bibframe.org/vocab/doi
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http://purl.org/ne...btex#hasPublisher
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https://schema.org/isbn
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http://localhost/t...ganizacniJednotka
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is http://linked.open...avai/riv/vysledek
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