About: Retargetable Multi-level Debugging in HW/SW Codesign

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Debugging is a standard part of an embedded system design process. The debugger is used for a target application debugging and for a testing of the designed system. The target application debugging can be performed either on a statement-accurate level (i.e. source-language level debugging) or on an instruction-accurate level (i.e. assembly-language level debugging). The architecture design debugging is done on a cycle-accurate level. Nowadays embedded systems are often parallel-based. Therefore, it is important to allow debugging of systems with more than one application-specific instruction set processors (ASIP). Since the current trend of ASIP design is focused on automatic tool-chain generation, the debugger must be retargetable to arbitrary architecture. In this paper, we present the concept of an automatically generated multi-level retargetable debugger. This debugger can operate on each of the previously mentioned levels and it allows debugging of multiprocessor systems. The experim Debugging is a standard part of an embedded system design process. The debugger is used for a target application debugging and for a testing of the designed system. The target application debugging can be performed either on a statement-accurate level (i.e. source-language level debugging) or on an instruction-accurate level (i.e. assembly-language level debugging). The architecture design debugging is done on a cycle-accurate level. Nowadays embedded systems are often parallel-based. Therefore, it is important to allow debugging of systems with more than one application-specific instruction set processors (ASIP). Since the current trend of ASIP design is focused on automatic tool-chain generation, the debugger must be retargetable to arbitrary architecture. In this paper, we present the concept of an automatically generated multi-level retargetable debugger. This debugger can operate on each of the previously mentioned levels and it allows debugging of multiprocessor systems. The experim (en)
Title	Retargetable Multi-level Debugging in HW/SW Codesign Retargetable Multi-level Debugging in HW/SW Codesign (en)
skos:prefLabel	Retargetable Multi-level Debugging in HW/SW Codesign Retargetable Multi-level Debugging in HW/SW Codesign (en)
skos:notation	RIV/00216305:26230/11:PU96012!RIV12-TA0-26230___
http://linked.open...avai/predkladatel	Fakulta informačních technologií
http://linked.open...avai/riv/aktivita	P S Z
http://linked.open...avai/riv/aktivity	P(7H10014), P(FR-TI1/038), P(TA01010667), S, Z(MSM0021630528)
http://linked.open...vai/riv/dodaniDat	2012
http://linked.open...aciTvurceVysledku	Přikryl, Zdeněk Křoustek, Jakub Hruška, Tomáš Kolář, Dušan
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	226849
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/11:PU96012
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	debugging, breakpoint, simulation, DWARF, JTAG, architecture description languages, application-specific instruction set processors (en)
http://linked.open.../riv/klicoveSlovo	architecture description languages DWARF JTAG breakpoint simulation application-specific instruction set processors debugging
http://linked.open...ontrolniKodProRIV	[1D9D36728E98]
http://linked.open...v/mistoKonaniAkce	Hammamet
http://linked.open...i/riv/mistoVydani	Hammamet
http://linked.open...i/riv/nazevZdroje	The 23rd International Conference on Microelectronics (ICM 2011)
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	4 (xsd:int)
http://linked.open...cetTvurcuVysledku	4 (xsd:int)
http://linked.open...vavai/riv/projekt	System for Support of Platform Independent Malware Analysis in Executable Files. Smart Multicore Embedded SYstems System for Programming and Realization of Embedded Systems
http://linked.open...UplatneniVysledku	2011
http://linked.open...iv/tvurceVysledku	Hruška, Tomáš Kolář, Dušan Křoustek, Jakub Přikryl, Zdeněk
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2011-12-19 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Výzkum informačních technologií z hlediska bezpečnosti
number of pages	6 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Institute of Electrical and Electronics Engineers
https://schema.org/isbn	978-1-4577-2209-7
http://localhost/t...ganizacniJednotka	26230
is http://linked.open...avai/riv/vysledek of	Retargetable Multi-level Debugging in HW/SW Codesign Retargetable Multi-level Debugging in HW/SW Codesign

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