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Description
  • Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools should be generated automatically based on a processor description. One of the most important tools is the simulator. It is used during a testing phase of the processor design and during target software development. The key feature of the simulator is its speed. The concept of a special simulation type - translated simulation - is presented in this paper. This simulation exploits information from a target C compiler. Both the simulator and the C compiler are generated based on the processor description in an architecture description language ISAC. Experimental results of this concept show very good simulation speed and fast generation of the simulator.
  • Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools should be generated automatically based on a processor description. One of the most important tools is the simulator. It is used during a testing phase of the processor design and during target software development. The key feature of the simulator is its speed. The concept of a special simulation type - translated simulation - is presented in this paper. This simulation exploits information from a target C compiler. Both the simulator and the C compiler are generated based on the processor description in an architecture description language ISAC. Experimental results of this concept show very good simulation speed and fast generation of the simulator. (en)
Title
  • Fast Translated Simulation of ASIPs
  • Fast Translated Simulation of ASIPs (en)
skos:prefLabel
  • Fast Translated Simulation of ASIPs
  • Fast Translated Simulation of ASIPs (en)
skos:notation
  • RIV/00216305:26230/11:PU95993!RIV13-MSM-26230___
http://linked.open...avai/predkladatel
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(7H10014), P(FR-TI1/038), P(GD102/09/H042), S, Z(MSM0021630528)
http://linked.open...iv/cisloPeriodika
  • 1
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 199377
http://linked.open...ai/riv/idVysledku
  • RIV/00216305:26230/11:PU95993
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • Hardware/sofware co-design, Translated simulation, Architecture description language, Application-specific instruction set processors (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...odStatuVydavatele
  • DE - Spolková republika Německo
http://linked.open...ontrolniKodProRIV
  • [AE7310634552]
http://linked.open...i/riv/nazevZdroje
  • OpenAccess Series in Informatics (OASIcs)
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...v/svazekPeriodika
  • 16
http://linked.open...iv/tvurceVysledku
  • Hruška, Tomáš
  • Kolář, Dušan
  • Křoustek, Jakub
  • Přikryl, Zdeněk
http://linked.open...n/vavai/riv/zamer
issn
  • 2190-6807
number of pages
http://bibframe.org/vocab/doi
  • 10.4230/OASIcs.MEMICS.2010.93
http://localhost/t...ganizacniJednotka
  • 26230
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