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Description
| - Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools should be generated automatically based on a processor description. One of the most important tools is the simulator. It is used during a testing phase of the processor design and during target software development. The key feature of the simulator is its speed. The concept of a special simulation type - translated simulation - is presented in this paper. This simulation exploits information from a target C compiler. Both the simulator and the C compiler are generated based on the processor description in an architecture description language ISAC. Experimental results of this concept show very good simulation speed and fast generation of the simulator.
- Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools should be generated automatically based on a processor description. One of the most important tools is the simulator. It is used during a testing phase of the processor design and during target software development. The key feature of the simulator is its speed. The concept of a special simulation type - translated simulation - is presented in this paper. This simulation exploits information from a target C compiler. Both the simulator and the C compiler are generated based on the processor description in an architecture description language ISAC. Experimental results of this concept show very good simulation speed and fast generation of the simulator. (en)
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Title
| - Fast Translated Simulation of ASIPs
- Fast Translated Simulation of ASIPs (en)
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skos:prefLabel
| - Fast Translated Simulation of ASIPs
- Fast Translated Simulation of ASIPs (en)
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skos:notation
| - RIV/00216305:26230/11:PU95993!RIV13-MSM-26230___
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http://linked.open...avai/predkladatel
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
| - P(7H10014), P(FR-TI1/038), P(GD102/09/H042), S, Z(MSM0021630528)
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http://linked.open...iv/cisloPeriodika
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/00216305:26230/11:PU95993
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
| - Hardware/sofware co-design, Translated simulation, Architecture description language, Application-specific instruction set processors (en)
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...odStatuVydavatele
| - DE - Spolková republika Německo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...i/riv/nazevZdroje
| - OpenAccess Series in Informatics (OASIcs)
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...vavai/riv/projekt
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http://linked.open...UplatneniVysledku
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http://linked.open...v/svazekPeriodika
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http://linked.open...iv/tvurceVysledku
| - Hruška, Tomáš
- Kolář, Dušan
- Křoustek, Jakub
- Přikryl, Zdeněk
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http://linked.open...n/vavai/riv/zamer
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issn
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number of pages
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http://bibframe.org/vocab/doi
| - 10.4230/OASIcs.MEMICS.2010.93
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http://localhost/t...ganizacniJednotka
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is http://linked.open...avai/riv/vysledek
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