About: A Programmable Interconnection Network for Multiple Communication Patterns

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Application-specific or embedded systems with less than 16 processing cores are too small to use some kind of network on chip (NoC) for interconnection. On the other hand, a crossbar and related circuitry (arbiters, memory elements) are too expensive in terms of chip area. As only few pair-wise and collective communication patterns are mostly used in specific applications, we explore an interconnection network that can support only selected communication patterns and no others. The main contribution of the paper is designing of such networks without routers or arbiters, in a form of programmable combinational logic, with limited crossbar functionality. The interconnection network can be implemented by multiplexers or block RAMs on the FPGA chip at a very low cost. A functional decomposition of the related multiple-output Boolean function into a cascade of block RAM devices is aided by multi-terminal binary decision diagrams and is illustrated on examples. Application-specific or embedded systems with less than 16 processing cores are too small to use some kind of network on chip (NoC) for interconnection. On the other hand, a crossbar and related circuitry (arbiters, memory elements) are too expensive in terms of chip area. As only few pair-wise and collective communication patterns are mostly used in specific applications, we explore an interconnection network that can support only selected communication patterns and no others. The main contribution of the paper is designing of such networks without routers or arbiters, in a form of programmable combinational logic, with limited crossbar functionality. The interconnection network can be implemented by multiplexers or block RAMs on the FPGA chip at a very low cost. A functional decomposition of the related multiple-output Boolean function into a cascade of block RAM devices is aided by multi-terminal binary decision diagrams and is illustrated on examples. (en)
Title	A Programmable Interconnection Network for Multiple Communication Patterns A Programmable Interconnection Network for Multiple Communication Patterns (en)
skos:prefLabel	A Programmable Interconnection Network for Multiple Communication Patterns A Programmable Interconnection Network for Multiple Communication Patterns (en)
skos:notation	RIV/00216305:26230/11:PU95970!RIV12-MSM-26230___
http://linked.open...avai/predkladatel	Fakulta informačních technologií
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(GAP103/10/1517), P(GD102/09/H042), Z(MSM0021630528)
http://linked.open...vai/riv/dodaniDat	2012
http://linked.open...aciTvurceVysledku	Jaroš, Jiří Dvořák, Václav
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	184080
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/11:PU95970
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	multiprocessor SoCs, programmable interconnection, on-chip interconnects, crossbar switch, logic decomposition, multi-terminal BDDs (en)
http://linked.open.../riv/klicoveSlovo	crossbar switch logic decomposition multi-terminal BDDs multiprocessor SoCs on-chip interconnects programmable interconnection
http://linked.open...ontrolniKodProRIV	[15F2CD2C5ECB]
http://linked.open...v/mistoKonaniAkce	St. Maarten, The Netherlands Antilles
http://linked.open...i/riv/mistoVydani	St. Maarten
http://linked.open...i/riv/nazevZdroje	Proceedings of the Sixth International Conference on Systems, ICONS 2011
http://linked.open...in/vavai/riv/obor	IN
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...vavai/riv/projekt	Mathematical and Engineering Approaches to Developing Reliable and Secure Concurrent and Distributed Computer Systems Natural Computing on Unconventional Platforms
http://linked.open...UplatneniVysledku	2011
http://linked.open...iv/tvurceVysledku	Dvořák, Václav Jaroš, Jiří
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2011-01-23 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Výzkum informačních technologií z hlediska bezpečnosti
number of pages	6 (xsd:int)
http://purl.org/ne...btex#hasPublisher	International Academy, Research, and Industry Association
https://schema.org/isbn	978-1-61208-002-4
http://localhost/t...ganizacniJednotka	26230
is http://linked.open...avai/riv/vysledek of	A Programmable Interconnection Network for Multiple Communication Patterns A Programmable Interconnection Network for Multiple Communication Patterns

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