About: Polymorphic Gates in Design and Test of Digital Circuits

Facets (new session)
Description
Metadata
Settings
- owl:sameAs
- Inference Rule:

About: Polymorphic Gates in Design and Test of Digital Circuits Goto Sponge NotDistinct Permalink

An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

Attributes	Values
rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Polymorphic gates are unconventional logic components which can switch their logic functions according to changing environment. The first part of this study presents an evolutionary approach to the design of polymorphic modules which exhibit different logic functions in different environments. The most complicated circuit that we evolved contains more than 100 gates. The second part of this study shows how to reduce the number of test vectors of a digital circuit by replacing some of its gates by polymorphic gates. In the first polymorphic mode, the circuit implements the original function. When switched to the second polymorphic mode, it can be tested using fewer test vectors than in the first polymorphic mode; however, the same fault coverage is obtained. The number of test vectors was reduced on 50-91% of its original volume for six benchmark circuits. The paper also discusses various obstacles which one has to deal with during a practical utilization of polymorphic gates. <br> Polymorphic gates are unconventional logic components which can switch their logic functions according to changing environment. The first part of this study presents an evolutionary approach to the design of polymorphic modules which exhibit different logic functions in different environments. The most complicated circuit that we evolved contains more than 100 gates. The second part of this study shows how to reduce the number of test vectors of a digital circuit by replacing some of its gates by polymorphic gates. In the first polymorphic mode, the circuit implements the original function. When switched to the second polymorphic mode, it can be tested using fewer test vectors than in the first polymorphic mode; however, the same fault coverage is obtained. The number of test vectors was reduced on 50-91% of its original volume for six benchmark circuits. The paper also discusses various obstacles which one has to deal with during a practical utilization of polymorphic gates. <br> (en)
Title	Polymorphic Gates in Design and Test of Digital Circuits Polymorphic Gates in Design and Test of Digital Circuits (en)
skos:prefLabel	Polymorphic Gates in Design and Test of Digital Circuits Polymorphic Gates in Design and Test of Digital Circuits (en)
skos:notation	RIV/00216305:26230/08:PU76687!RIV10-MSM-26230___
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(GA102/06/0599), Z(MSM0021630528)
http://linked.open...iv/cisloPeriodika	2
http://linked.open...vai/riv/dodaniDat	2010
http://linked.open...aciTvurceVysledku	Stareček, Lukáš Sekanina, Lukáš Kotásek, Zdeněk Gajda, Zbyšek
http://linked.open.../riv/druhVysledku	J - Článek v odborném periodiku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	387433
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/08:PU76687
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	digital circuit, polymorphic gate, test, adaptation, evolutionary algorithm (en)
http://linked.open.../riv/klicoveSlovo	digital circuit adaptation evolutionary algorithm test polymorphic gate
http://linked.open...odStatuVydavatele	US - Spojené státy americké
http://linked.open...ontrolniKodProRIV	[ADFEDA24D033]
http://linked.open...i/riv/nazevZdroje	International Journal of Unconventional Computing
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	4 (xsd:int)
http://linked.open...cetTvurcuVysledku	4 (xsd:int)
http://linked.open...vavai/riv/projekt	Methods of polymorphic digital circuit design
http://linked.open...UplatneniVysledku	2008
http://linked.open...v/svazekPeriodika	4
http://linked.open...iv/tvurceVysledku	Kotásek, Zdeněk Sekanina, Lukáš Gajda, Zbyšek Stareček, Lukáš
http://linked.open...n/vavai/riv/zamer	Výzkum informačních technologií z hlediska bezpečnosti
issn	1548-7199
number of pages	18 (xsd:int)
http://localhost/t...ganizacniJednotka	26230
is http://linked.open...avai/riv/vysledek of	Polymorphic Gates in Design and Test of Digital Circuits Polymorphic Gates in Design and Test of Digital Circuits Polymorphic Gates in Design and Test of Digital Circuits Polymorphic Gates in Design and Test of Digital Circuits

Faceted Search & Find service v1.16.118 as of Jun 21 2024

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 07.20.3240 as of Jun 21 2024, on Linux (x86_64-pc-linux-gnu), Single-Server Edition (126 GB total memory, 58 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software