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Description
  • The paper presents a new approach to formal verification of generic (i.e. parametrised) hardware designs specified in VHDL. The proposed approach is based on a translation of such designs to counter automata and on exploiting the recent advances achieved in the area of their automated formal verification. We have implemented the proposed translation. Using one of the state-of-the-art tools for verification of counter automata, we were then able to verify several non-trivial properties of parametrised VHDL components, including a real-life one.
  • The paper presents a new approach to formal verification of generic (i.e. parametrised) hardware designs specified in VHDL. The proposed approach is based on a translation of such designs to counter automata and on exploiting the recent advances achieved in the area of their automated formal verification. We have implemented the proposed translation. Using one of the state-of-the-art tools for verification of counter automata, we were then able to verify several non-trivial properties of parametrised VHDL components, including a real-life one. (en)
Title
  • Verifying Parametrised Hardware Designs Via Counter Automata
  • Verifying Parametrised Hardware Designs Via Counter Automata (en)
skos:prefLabel
  • Verifying Parametrised Hardware Designs Via Counter Automata
  • Verifying Parametrised Hardware Designs Via Counter Automata (en)
skos:notation
  • RIV/00216305:26230/08:PU70924!RIV10-MSM-26230___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • Z(MSM0021630528), Z(MSM6383917201)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 402554
http://linked.open...ai/riv/idVysledku
  • RIV/00216305:26230/08:PU70924
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • formal verification, hardware design, counter automaton, VHDL<br> (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [DF433F1CC75E]
http://linked.open...v/mistoKonaniAkce
  • IBM Haifa Labs
http://linked.open...i/riv/mistoVydani
  • Heidelberg
http://linked.open...i/riv/nazevZdroje
  • Hardware and Software, Verification and Testing
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Vojnar, Tomáš
  • Smrčka, Aleš
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
issn
  • 0302-9743
number of pages
http://purl.org/ne...btex#hasPublisher
  • Springer-Verlag
http://localhost/t...ganizacniJednotka
  • 26230
is http://linked.open...avai/riv/vysledek of
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