About: PANACHE - Pilot line for Advanced Nonvolatile memory technologies for Automotive microControllers, High security applications and general Electronics

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Projekt, within Data Space : linked.opendata.cz associated with source document(s)

Attributes	Values
rdf:type	http://linked.opendata.cz/ontology/domain/vavai/Projekt
rdfs:seeAlso	http://www.isvav.cz/projectDetail.do?rowId=7H14006
Description	The PANACHE project objective is to set-up a pilot line for embedded Flash technology design and manufacturing platform for the prototyping of innovative μcontrollers in Europe. The current 40nm technology platform as well as the already defined 55nm technology platform will be developed and consolidated in order to build a solid manufacturing platform on these technology nodes. The project will also extend to build the basic blocks of the technology node after 40nm; with the ambition to achieve a prototyping maturity for a new BEOL based non-volatile memory architecture suitable with the 28 nm node. To achieve this goal of generating high value added semiconductor circuits in Europe in a breakthrough leading edge technology the project will deploy all the necessary activities to bring a new technology to an early industrial maturity stage. The PANACHE project objective is to set-up a pilot line for embedded Flash technology design and manufacturing platform for the prototyping of innovative μcontrollers in Europe. The current 40nm technology platform as well as the already defined 55nm technology platform will be developed and consolidated in order to build a solid manufacturing platform on these technology nodes. The project will also extend to build the basic blocks of the technology node after 40nm; with the ambition to achieve a prototyping maturity for a new BEOL based non-volatile memory architecture suitable with the 28 nm node. To achieve this goal of generating high value added semiconductor circuits in Europe in a breakthrough leading edge technology the project will deploy all the necessary activities to bring a new technology to an early industrial maturity stage. (en)
Title	PANACHE - Pilot line for Advanced Nonvolatile memory technologies for Automotive microControllers, High security applications and general Electronics PANACHE - Pilot line for Advanced Nonvolatile memory technologies for Automotive microControllers, High security applications and general Electronics (en)
skos:notation	7H14006
http://linked.open...avai/cep/aktivita	Joint Technology Initiatives
http://linked.open...kovaStatniPodpora	http://linked.opendata.cz/resource/domain/vavai/projekt/7H14006/celkovaStatniPodpora
http://linked.open...ep/celkoveNaklady	http://linked.opendata.cz/resource/domain/vavai/projekt/7H14006/celkoveNaklady
http://linked.open...datumDodatniDoRIV	2015-03-20 (xsd:date)
http://linked.open...i/cep/druhSouteze	RP - Spolufinancování programu ES
http://linked.open...ep/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open.../cep/fazeProjektu	101113887
http://linked.open...ai/cep/hlavniObor	JA - Elektronika a optoelektronika, elektrotechnika
http://linked.open...vai/cep/kategorie	AP - Aplikovaný výzkum
http://linked.open.../cep/klicovaSlova	embedded nonvolatile memory technology; CMOS technology; System-on-Chip (en)
http://linked.open...ep/partnetrHlavni	Ústav teorie informace a automatizace AV ČR, v. v. i.
http://linked.open...inujicichPrijemcu	0 (xsd:int)
http://linked.open...cep/pocetPrijemcu	1 (xsd:int)
http://linked.open...ocetSpoluPrijemcu	0 (xsd:int)
http://linked.open.../pocetVysledkuRIV	1 (xsd:int)
http://linked.open...enychVysledkuVRIV	1 (xsd:int)
http://linked.open...lneniVMinulemRoce	2014-06-17 (xsd:date)
http://linked.open.../prideleniPodpory	http://linked.opendata.cz/resource/domain/vavai/cep/prideleniPodpory/MSMT-16274%2F2014-1
http://linked.open...iciPoslednihoRoku	2015
http://linked.open...atUdajeProjZameru	2015
http://linked.open...usZobrazovaneFaze	DRRVB
http://linked.open...ai/cep/typPojektu	P - Projekt výzkumu a vývoje financovaný ze státního rozpočtu
http://linked.open...ep/ukonceniReseni	2017-12-31 (xsd:date)
http://linked.open.../cep/vedlejsiObor	JC - Počítačový hardware a software
http://linked.open...ep/zahajeniReseni	2014-01-02 (xsd:date)
http://linked.open...tniCyklusProjektu	ZB
http://linked.open.../cep/klicoveSlovo	CMOS technology embedded nonvolatile memory technology
is http://linked.open...vavai/riv/projekt of	UTIA EdkDSP Demonstrator in Xilinx 3S700AN FPGA with Embedded FLASH and NV RAM
is http://linked.open...vavai/cep/projekt of	http://linked.opendata.cz/resource/domain/vavai/cep/ucast/7H14006/2014/ico%3A67985556 http://linked.opendata.cz/resource/domain/vavai/cep/ucast/7H14006/2015/ico%3A67985556 http://linked.opendata.cz/resource/domain/vavai/cep/ucast/7H14006/2016/ico%3A67985556 http://linked.opendata.cz/resource/domain/vavai/cep/ucast/7H14006/2017/ico%3A67985556

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