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  • This paper presents the method of dependability parameters improvement for systems based on unreliable components such as Field Programmable Gate Arrays (FPGAs). It combines Concurrent Error Detection (CED) techniques [4], FPGA dynamic reconfigurations and our previously designed Modified Duplex System (MDS) architecture. The methodology is developed with respect to the minimal area overhead and high availability. It is aimed for mission critical practical applications of modular systems. Therefore it is applied and tested on the safety railway station system, where all these parameters are required. This Fault-Tolerant (FT) design is modeled and tested to fulfill strict Czech standards [7]. The proposed method is based on static and partial dynamic reconfiguration [5] of totally self-checking blocks which allows a full recovery from a Single Even Upset (SEU). This method is compared with triple module redundancy technique.
  • This paper presents the method of dependability parameters improvement for systems based on unreliable components such as Field Programmable Gate Arrays (FPGAs). It combines Concurrent Error Detection (CED) techniques [4], FPGA dynamic reconfigurations and our previously designed Modified Duplex System (MDS) architecture. The methodology is developed with respect to the minimal area overhead and high availability. It is aimed for mission critical practical applications of modular systems. Therefore it is applied and tested on the safety railway station system, where all these parameters are required. This Fault-Tolerant (FT) design is modeled and tested to fulfill strict Czech standards [7]. The proposed method is based on static and partial dynamic reconfiguration [5] of totally self-checking blocks which allows a full recovery from a Single Even Upset (SEU). This method is compared with triple module redundancy technique. (en)
Title
  • Fault Tolerant Duplex System with High Availability for Practical Applications
  • Fault Tolerant Duplex System with High Availability for Practical Applications (en)
skos:prefLabel
  • Fault Tolerant Duplex System with High Availability for Practical Applications
  • Fault Tolerant Duplex System with High Availability for Practical Applications (en)
skos:notation
  • RIV/68407700:21240/14:00219852!RIV15-MSM-21240___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • I, S
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 16560
http://linked.open...ai/riv/idVysledku
  • RIV/68407700:21240/14:00219852
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • SEU; duplex system; TMR; FPGA; reconfiguration; availability; dependability; reliability (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [EF122383B4F9]
http://linked.open...v/mistoKonaniAkce
  • Verona
http://linked.open...i/riv/mistoVydani
  • Piscataway
http://linked.open...i/riv/nazevZdroje
  • Proceedings of 2014 17th Euromicro Conference
http://linked.open...in/vavai/riv/obor
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http://linked.open...cetTvurcuVysledku
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Kubátová, Hana
  • Borecký, Jaroslav
  • Kohlík, Martin
  • Vít, Pavel
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
number of pages
http://bibframe.org/vocab/doi
  • 10.1109/DSD.2014.54
http://purl.org/ne...btex#hasPublisher
  • IEEE
https://schema.org/isbn
  • 978-1-4799-5793-4
http://localhost/t...ganizacniJednotka
  • 21240
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