About: System Design of an FPGA Linear Solver

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	The work is focused on design of a Modular System performing error-free solution of dense linear systems using residue arithmetic in Xilinx FPGA. The designed system shall use a set of Residual Processors (RP)s for linear system solution in Residue Number System and reconstruct the set's solution afterwards. The currently proposed system's architecture has a single RP, a large DDR memory used for data transfer in between a PC and the system, and a built-in MicroBlaze processor. Future work will focus on extending the architecture to implement the entire Modular System consisting of multiple RPs and performing the backward transformation from residue representation into the rational number set. The work is focused on design of a Modular System performing error-free solution of dense linear systems using residue arithmetic in Xilinx FPGA. The designed system shall use a set of Residual Processors (RP)s for linear system solution in Residue Number System and reconstruct the set's solution afterwards. The currently proposed system's architecture has a single RP, a large DDR memory used for data transfer in between a PC and the system, and a built-in MicroBlaze processor. Future work will focus on extending the architecture to implement the entire Modular System consisting of multiple RPs and performing the backward transformation from residue representation into the rational number set. (en)
Title	System Design of an FPGA Linear Solver System Design of an FPGA Linear Solver (en)
skos:prefLabel	System Design of an FPGA Linear Solver System Design of an FPGA Linear Solver (en)
skos:notation	RIV/68407700:21240/14:00219269!RIV15-GA0-21240___
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(GAP103/12/2377)
http://linked.open...vai/riv/dodaniDat	2015
http://linked.open...aciTvurceVysledku	Buček, Jiří Kubalík, Pavel Zahradnický, Tomáš Lórencz, Róbert
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	49090
http://linked.open...ai/riv/idVysledku	RIV/68407700:21240/14:00219269
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	system of linear equations; residue number system; error-free computation; FPGA (en)
http://linked.open.../riv/klicoveSlovo	FPGA error-free computation residue number system system of linear equations
http://linked.open...ontrolniKodProRIV	[5ACD9C62DC32]
http://linked.open...v/mistoKonaniAkce	Verona
http://linked.open...i/riv/mistoVydani	Linz
http://linked.open...i/riv/nazevZdroje	Proceedings of the Work in Progress Session held in connection with the 40th EUROMICRO Conference on Software Engineering and Advanced Applications and the 17th EUROMICRO Conference on Digital System Design
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	4 (xsd:int)
http://linked.open...cetTvurcuVysledku	4 (xsd:int)
http://linked.open...vavai/riv/projekt	Study of properties of residual arithmetic for solving sets of linear equations
http://linked.open...UplatneniVysledku	2014
http://linked.open...iv/tvurceVysledku	Buček, Jiří Kubalík, Pavel Lórencz, Róbert Zahradnický, Tomáš
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2014-08-27 (xsd:date)
number of pages	2 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Johannes Kepler University
https://schema.org/isbn	978-3-902457-40-0
http://localhost/t...ganizacniJednotka	21240

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