About: Fault-tolerant and fail-safe design based on reconfiguration

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

Attributes	Values
rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
rdfs:seeAlso	http://www.igi-global.com/embeddedcontent.aspx?PageCode=WGSLd
Description	The main aim of this chapter is to present the way, how to design fault-tolerant or fail-safe systems in programmable hardware (FPGAs) and therefore to use FPGAs in mission-critical applications, too. RAM based FPGAs are usually taken for unreliable due to high probability of transient faults (SEU) and therefore inapplicable in this area. But FPGAs can be easily reconfigured. Our aim is to utilize appropriate type of FPGA reconfiguration and to combine it with well-known methods for fail-safe and fault-tolerant design (duplex, TMR) including on-line testing methods for fault detection and then startup of the reconfiguration process. Dependability parameters' calculations based on reliability models is integral part of proposed methodology. The trade-off between the requested level of dependability characteristics of a designed system and area overhead with respect to FPGA possible faults is main property and advantage of proposed methodology. The main aim of this chapter is to present the way, how to design fault-tolerant or fail-safe systems in programmable hardware (FPGAs) and therefore to use FPGAs in mission-critical applications, too. RAM based FPGAs are usually taken for unreliable due to high probability of transient faults (SEU) and therefore inapplicable in this area. But FPGAs can be easily reconfigured. Our aim is to utilize appropriate type of FPGA reconfiguration and to combine it with well-known methods for fail-safe and fault-tolerant design (duplex, TMR) including on-line testing methods for fault detection and then startup of the reconfiguration process. Dependability parameters' calculations based on reliability models is integral part of proposed methodology. The trade-off between the requested level of dependability characteristics of a designed system and area overhead with respect to FPGA possible faults is main property and advantage of proposed methodology. (en)
Title	Fault-tolerant and fail-safe design based on reconfiguration Fault-tolerant and fail-safe design based on reconfiguration (en)
skos:prefLabel	Fault-tolerant and fail-safe design based on reconfiguration Fault-tolerant and fail-safe design based on reconfiguration (en)
skos:notation	RIV/68407700:21240/11:00179457!RIV12-MSM-21240___
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(GA102/09/1668), Z(MSM6840770014)
http://linked.open...vai/riv/dodaniDat	2012
http://linked.open...aciTvurceVysledku	Kubátová, Hana Kubalík, Pavel
http://linked.open.../riv/druhVysledku	C - Kapitola v knize
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	199428
http://linked.open...ai/riv/idVysledku	RIV/68407700:21240/11:00179457
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	fault-tolerance; reconfigurability; programmable hardware; on-line testing (en)
http://linked.open.../riv/klicoveSlovo	fault-tolerance on-line testing reconfigurability programmable hardware
http://linked.open...ontrolniKodProRIV	[73F7DD574A26]
http://linked.open...i/riv/mistoVydani	Hershey, Pennsylvania
http://linked.open...i/riv/nazevZdroje	Design and Test Technology for Dependable Systems-on-Chip
http://linked.open...in/vavai/riv/obor	IN
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...v/pocetStranKnihy	314 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...vavai/riv/projekt	SoC circuits reliability and availability improvement
http://linked.open...UplatneniVysledku	2011
http://linked.open...iv/tvurceVysledku	Kubátová, Hana Kubalík, Pavel
http://linked.open...n/vavai/riv/zamer	Výzkum perspektivních informačních a komunikačních technologií
number of pages	20 (xsd:int)
http://bibframe.org/vocab/doi	10.4018/978-1-60960-212-3
http://purl.org/ne...btex#hasPublisher	IGI Global
https://schema.org/isbn	978-1-60960-212-3
http://localhost/t...ganizacniJednotka	21240

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