Attributes | Values |
---|
rdf:type
| |
Description
| - This work deals with design and implementation of a Serial ATA core with cryptography support in HDL language. The core is implemented and tested on Xilinx Virtex-5 FXT FPGA, Xilinx ML-507 development board. The system is controlled by using Ethernet frames. Cryptographic AES-128 core is placed between Ethernet and SATA core, making possible to crypt stream of transferred data. The design uses Xilinx Serial ATA PHY and Xiling TEMAC hard cores. First part of this work deals with analysis of Serial ATA protocol and cryptography as well, next part deals with overall system design, the last one describes system implementation and testing.
- This work deals with design and implementation of a Serial ATA core with cryptography support in HDL language. The core is implemented and tested on Xilinx Virtex-5 FXT FPGA, Xilinx ML-507 development board. The system is controlled by using Ethernet frames. Cryptographic AES-128 core is placed between Ethernet and SATA core, making possible to crypt stream of transferred data. The design uses Xilinx Serial ATA PHY and Xiling TEMAC hard cores. First part of this work deals with analysis of Serial ATA protocol and cryptography as well, next part deals with overall system design, the last one describes system implementation and testing. (en)
|
Title
| - Serial ATA core with cryptography support
- Serial ATA core with cryptography support (en)
|
skos:prefLabel
| - Serial ATA core with cryptography support
- Serial ATA core with cryptography support (en)
|
skos:notation
| - RIV/68407700:21240/09:00165711!RIV10-GA0-21240___
|
http://linked.open...avai/riv/aktivita
| |
http://linked.open...avai/riv/aktivity
| |
http://linked.open...vai/riv/dodaniDat
| |
http://linked.open...aciTvurceVysledku
| |
http://linked.open.../riv/druhVysledku
| |
http://linked.open...iv/duvernostUdaju
| |
http://linked.open...titaPredkladatele
| |
http://linked.open...dnocenehoVysledku
| |
http://linked.open...ai/riv/idVysledku
| - RIV/68407700:21240/09:00165711
|
http://linked.open...terniIdentifikace
| |
http://linked.open...riv/jazykVysledku
| |
http://linked.open.../riv/klicovaSlova
| - HDL Language; FPGA; Cryptographic; SATA disc (en)
|
http://linked.open.../riv/klicoveSlovo
| |
http://linked.open...ontrolniKodProRIV
| |
http://linked.open.../licencniPoplatek
| |
http://linked.open...okalizaceVysledku
| |
http://linked.open...in/vavai/riv/obor
| |
http://linked.open...ichTvurcuVysledku
| |
http://linked.open...cetTvurcuVysledku
| |
http://linked.open...vavai/riv/projekt
| |
http://linked.open...UplatneniVysledku
| |
http://linked.open...echnickeParametry
| - Externí modul s přeloženým VHDL kódem
|
http://linked.open...iv/tvurceVysledku
| - Chloupek, Martin
- Kubalík, Pavel
|
http://linked.open...avai/riv/vlastnik
| |
http://linked.open...itiJinymSubjektem
| |
http://localhost/t...ganizacniJednotka
| |