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  • The aim of this work is the solution for Low Drop Out (LDO) voltage regulator designed for SoC applications. Increasing priority of optimized power management and consequently prolonging battery life of mobile devices is one of key reasons for chip design changes towards SoC solutions where aforementioned power management components are critical and therefore the main topic of work. Classic power management system consists of several LDO regulators, which provide specific voltage required by individual subsystems. For conventional regulators, independent dedicated capacitors are used. Those provide AC stability and enhance transient characteristics. On the other hand, the same capacitors consume valuable space and occupy pins of a chip. The main problem, which must be solved, is that capacitor-less LDO regulator does not have dedicated capacitor connected to its output, while LDO regulator does. Instead of such dedicated capacitors the capacitor-less regulator is loaded only with capacities of particular systems it powers. Absence of dedicated capacitor has adverse influence on transient properties of the regulator.
  • The aim of this work is the solution for Low Drop Out (LDO) voltage regulator designed for SoC applications. Increasing priority of optimized power management and consequently prolonging battery life of mobile devices is one of key reasons for chip design changes towards SoC solutions where aforementioned power management components are critical and therefore the main topic of work. Classic power management system consists of several LDO regulators, which provide specific voltage required by individual subsystems. For conventional regulators, independent dedicated capacitors are used. Those provide AC stability and enhance transient characteristics. On the other hand, the same capacitors consume valuable space and occupy pins of a chip. The main problem, which must be solved, is that capacitor-less LDO regulator does not have dedicated capacitor connected to its output, while LDO regulator does. Instead of such dedicated capacitors the capacitor-less regulator is loaded only with capacities of particular systems it powers. Absence of dedicated capacitor has adverse influence on transient properties of the regulator. (en)
Title
  • Capacitor-less LDO regulator in CMOS technology
  • Capacitor-less LDO regulator in CMOS technology (en)
skos:prefLabel
  • Capacitor-less LDO regulator in CMOS technology
  • Capacitor-less LDO regulator in CMOS technology (en)
skos:notation
  • RIV/68407700:21230/12:00197331!RIV13-MSM-21230___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/09/1601), P(VG20102015015), S
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 125940
http://linked.open...ai/riv/idVysledku
  • RIV/68407700:21230/12:00197331
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • ESD; LDO regulator; capacitor-less; fast loop; transient response (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [FBD9F82FBCA6]
http://linked.open...v/mistoKonaniAkce
  • Brno
http://linked.open...i/riv/mistoVydani
  • Brno
http://linked.open...i/riv/nazevZdroje
  • Proceedings of Electronic Devices and Systems EDS 2012
http://linked.open...in/vavai/riv/obor
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http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Jakovenko, Jiří
  • Kotě, Vlastimil
  • Molata, Vladimír
  • Nápravník, Tomáš
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
number of pages
http://purl.org/ne...btex#hasPublisher
  • Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
https://schema.org/isbn
  • 978-80-214-4539-0
http://localhost/t...ganizacniJednotka
  • 21230
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