About: A Modular Hardware Platform for Brain Computer Interface

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	The contribution presents a novel highperformace, low power BCI architecture allowing a single-chip implementation of a BCI device. FPGA platform is used to reach high performance and low power consumption; to speed up the development cycle, high-level synthesis of DSP algorithms is employed. A novel highly modular architecture with many advantages (configurability, possibility of independent development, topological compatibility with 2D FPGA fabric, scalability, and high computational power) is proposed. The first block of the system is designed to prove the feasibility of the whole concept. Usage of high level synthesis is shown to reduce the development time about ten times compared to the standard RTL flow while generating design small enough so as we may fit the complete BCI pipeline into one FPGA device. The contribution presents a novel highperformace, low power BCI architecture allowing a single-chip implementation of a BCI device. FPGA platform is used to reach high performance and low power consumption; to speed up the development cycle, high-level synthesis of DSP algorithms is employed. A novel highly modular architecture with many advantages (configurability, possibility of independent development, topological compatibility with 2D FPGA fabric, scalability, and high computational power) is proposed. The first block of the system is designed to prove the feasibility of the whole concept. Usage of high level synthesis is shown to reduce the development time about ten times compared to the standard RTL flow while generating design small enough so as we may fit the complete BCI pipeline into one FPGA device. (en)
Title	A Modular Hardware Platform for Brain Computer Interface A Modular Hardware Platform for Brain Computer Interface (en)
skos:prefLabel	A Modular Hardware Platform for Brain Computer Interface A Modular Hardware Platform for Brain Computer Interface (en)
skos:notation	RIV/68407700:21230/12:00194654!RIV13-GA0-21230___
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(GAP102/11/1795)
http://linked.open...vai/riv/dodaniDat	2013
http://linked.open...aciTvurceVysledku	Šťastný, Jakub
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta elektrotechnická
http://linked.open...dnocenehoVysledku	120317
http://linked.open...ai/riv/idVysledku	RIV/68407700:21230/12:00194654
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	FPGA; BCI; EEG; low power; High Level Synthesis (en)
http://linked.open.../riv/klicoveSlovo	low power High Level Synthesis BCI EEG FPGA
http://linked.open...ontrolniKodProRIV	[C9D93999FB4B]
http://linked.open...v/mistoKonaniAkce	Plzeň
http://linked.open...i/riv/mistoVydani	Pilsen
http://linked.open...i/riv/nazevZdroje	2012 International Conference on Applied Electronics
http://linked.open...in/vavai/riv/obor	JA
http://linked.open...ichTvurcuVysledku	1 (xsd:int)
http://linked.open...cetTvurcuVysledku	1 (xsd:int)
http://linked.open...vavai/riv/projekt	Novel selective transforms for non-stationary signal processing
http://linked.open...UplatneniVysledku	2012
http://linked.open...iv/tvurceVysledku	Šťastný, Jakub
http://linked.open...vavai/riv/typAkce	EUR - Evropská
http://linked.open.../riv/zahajeniAkce	2012-09-06 (xsd:date)
issn	1803-7232
number of pages	4 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Západočeská univerzita v Plzni
https://schema.org/isbn	978-80-261-0038-6
http://localhost/t...ganizacniJednotka	21230

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