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  • A step-by-step design procedure of sub-bandgap voltage reference (BGR) is proposed. The procedure shows on example structure main design steps of crucial parameters verified later by a simulation. The block is meant to be fabricated in 0.35um CMOS process with analog options. The main features of the concept are the sub-bandgap output voltage of 0.7V, low supply voltage from 1.3V, low power consumption under 10uA, versatility, high working temperature range from −50 to 95◦C. The versatility of the block is supported by a temperature slope trimming, extended start-up and self testing. The IP block is compact, ready to adjust, layout and integrate. The features of the design also allow the in circuit tuning. This example circuit shows the use of the design algorithm including the optimization suggestions which lead to a complex design.
  • A step-by-step design procedure of sub-bandgap voltage reference (BGR) is proposed. The procedure shows on example structure main design steps of crucial parameters verified later by a simulation. The block is meant to be fabricated in 0.35um CMOS process with analog options. The main features of the concept are the sub-bandgap output voltage of 0.7V, low supply voltage from 1.3V, low power consumption under 10uA, versatility, high working temperature range from −50 to 95◦C. The versatility of the block is supported by a temperature slope trimming, extended start-up and self testing. The IP block is compact, ready to adjust, layout and integrate. The features of the design also allow the in circuit tuning. This example circuit shows the use of the design algorithm including the optimization suggestions which lead to a complex design. (en)
Title
  • Versatile Sub-BandGap Reference IP Core
  • Versatile Sub-BandGap Reference IP Core (en)
skos:prefLabel
  • Versatile Sub-BandGap Reference IP Core
  • Versatile Sub-BandGap Reference IP Core (en)
skos:notation
  • RIV/68407700:21230/10:00173347!RIV11-GA0-21230___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/07/1186), Z(MSM6840770014)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 295564
http://linked.open...ai/riv/idVysledku
  • RIV/68407700:21230/10:00173347
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • BGR; bandgap reference; design procedure; design algorithm; low-power; low-voltage (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [CF1423EC95FD]
http://linked.open...v/mistoKonaniAkce
  • Vienna
http://linked.open...i/riv/mistoVydani
  • Piscataway
http://linked.open...i/riv/nazevZdroje
  • Proc. of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Martinek, Pravoslav
  • Urban, Tomáš
  • Šubrt, Ondřej
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • IEEE
https://schema.org/isbn
  • 978-1-4244-6610-8
http://localhost/t...ganizacniJednotka
  • 21230
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