About: Experimental emulation of FPGA bitstream faults in combinatorial circuits

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Práce se zabývá vlivem jednobitové poruchy v kombinačních obvodech implementovaných v FPGA. Jsou zde popsány modely poruch v FPGA a výsledky z experimentálního měření na emulátoru těchto poruch. (cs) The main aim of our research is to design dependable circuit in FPGA. To make a real dependability model the real effects of injected errors and faults have to be studied. We proposed a hardware fault emulator here. The emulator deals with single-bit change in bitstream. Emulation is performed in user-selected area. Look-Up-Tables, cell interconnection, cell-to-bus connection and routing resources are considered. Other FPGA resources are not considered. Only combinatorial circuits and benchmarks were measured due to our knowledge of FPGA resource limitation. All tests were performed on Atmel FPSLIC architecture. The main aim of our research is to design dependable circuit in FPGA. To make a real dependability model the real effects of injected errors and faults have to be studied. We proposed a hardware fault emulator here. The emulator deals with single-bit change in bitstream. Emulation is performed in user-selected area. Look-Up-Tables, cell interconnection, cell-to-bus connection and routing resources are considered. Other FPGA resources are not considered. Only combinatorial circuits and benchmarks were measured due to our knowledge of FPGA resource limitation. All tests were performed on Atmel FPSLIC architecture. (en)
Title	Experimental emulation of FPGA bitstream faults in combinatorial circuits Experimental emulation of FPGA bitstream faults in combinatorial circuits (en) Experimentální emulace poruch v bitstreamu FPGA v kombinačních obvodech (cs)
skos:prefLabel	Experimental emulation of FPGA bitstream faults in combinatorial circuits Experimental emulation of FPGA bitstream faults in combinatorial circuits (en) Experimentální emulace poruch v bitstreamu FPGA v kombinačních obvodech (cs)
skos:notation	RIV/68407700:21230/08:03147008!RIV09-MPO-21230___
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(FI-IM4/149)
http://linked.open...vai/riv/dodaniDat	2009
http://linked.open...aciTvurceVysledku	Kvasnička, Jiří Kubátová, Hana Kubalík, Pavel
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta elektrotechnická
http://linked.open...dnocenehoVysledku	367176
http://linked.open...ai/riv/idVysledku	RIV/68407700:21230/08:03147008
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	FPGA; FPGA fault models; SEU effect; SEU emulation; bitstream analysis (en)
http://linked.open.../riv/klicoveSlovo	FPGA FPGA fault models SEU effect SEU emulation bitstream analysis
http://linked.open...ontrolniKodProRIV	[7C93FE5461BC]
http://linked.open...v/mistoKonaniAkce	High Tatras - Stará Lesná
http://linked.open...i/riv/mistoVydani	Košice
http://linked.open...i/riv/nazevZdroje	Proceedings of CSE 2008 International Scientific Conference on Computer Science and Engineering
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	3 (xsd:int)
http://linked.open...cetTvurcuVysledku	3 (xsd:int)
http://linked.open...vavai/riv/projekt	*Research and Development of High-rate Microwave Line Featured by QAM Modulation and the Transmission Speed of 155 Mbit/s.
http://linked.open...UplatneniVysledku	2008
http://linked.open...iv/tvurceVysledku	Kvasnička, Jiří Kubátová, Hana Kubalík, Pavel
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2008-09-24 (xsd:date)
number of pages	8 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Technická univerzita v Košiciach. Fakulta elektrotechniky a informatiky. Katedra počítačov a informatiky
https://schema.org/isbn	978-80-8086-092-9
http://localhost/t...ganizacniJednotka	21230

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