About: FPGA Based Tester Tool for Hybrid Real-Time Systems

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	This paper presents a design methodology for a hybrid Hardware-in-the-Loop (HIL) tester tool, based on both discrete event system theory, given by timed automata, and continuous systems theory, given by difference equations. It is implemented using an FPGA platform that guarantees speed enhancement, time accuracy and extensibility with no performance loss. We have focused on the implementation of a discrete event system, specifically timed automata into FPGA, and we have linked them with continuous systems implemented as filters in fixed point arithmetic. The paper shows a methodology, which employs widely used tools (Matlab, UPPAAL) as a user interface, and which implements the FPGA based tester tool. This paper presents a design methodology for a hybrid Hardware-in-the-Loop (HIL) tester tool, based on both discrete event system theory, given by timed automata, and continuous systems theory, given by difference equations. It is implemented using an FPGA platform that guarantees speed enhancement, time accuracy and extensibility with no performance loss. We have focused on the implementation of a discrete event system, specifically timed automata into FPGA, and we have linked them with continuous systems implemented as filters in fixed point arithmetic. The paper shows a methodology, which employs widely used tools (Matlab, UPPAAL) as a user interface, and which implements the FPGA based tester tool. (en) Článek prezentuje nástroj pro testování hybridních systémů v uzavřené smyčce. Spojitá část systému je reprezentována pomocí diferenčních rovnic a část sytému diskrétních událostí je reprezentována časovanými automaty. Nástroj je implementován pomocí konfigurovatelných hradlových polí (FPGA) zajišťujících rychlost, časovou determinističnost a snadnou rozšiřitelnost. (cs)
Title	FPGA Based Tester Tool for Hybrid Real-Time Systems FPGA Testovaci nastroj pro hybridnich systemy realneho casu (cs) FPGA Based Tester Tool for Hybrid Real-Time Systems (en)
skos:prefLabel	FPGA Based Tester Tool for Hybrid Real-Time Systems FPGA Testovaci nastroj pro hybridnich systemy realneho casu (cs) FPGA Based Tester Tool for Hybrid Real-Time Systems (en)
skos:notation	RIV/68407700:21230/08:03146822!RIV09-MPO-21230___
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(FT-TA3/044), Z(MSM6840770038)
http://linked.open...iv/cisloPeriodika	8
http://linked.open...vai/riv/dodaniDat	2009
http://linked.open...aciTvurceVysledku	Hanzálek, Zdeněk Krákora, Jan
http://linked.open.../riv/druhVysledku	J - Článek v odborném periodiku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta elektrotechnická
http://linked.open...dnocenehoVysledku	368439
http://linked.open...ai/riv/idVysledku	RIV/68407700:21230/08:03146822
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	FPGA; Hardware-in-the-Loop; Hybrid system; Model checking; Real-time system testing; System control; Timed automata (en)
http://linked.open.../riv/klicoveSlovo	Hybrid system FPGA Model checking Timed automata Hardware-in-the-Loop Real-time system testing System control
http://linked.open...odStatuVydavatele	NL - Nizozemsko
http://linked.open...ontrolniKodProRIV	[2B65CF2C13DA]
http://linked.open...i/riv/nazevZdroje	MICROPROCESSORS AND MICROSYSTEMS - EMBEDDED HARDWARE DESIGN
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...vavai/riv/projekt	*Module solution of FLY-BY-WIRE control system for light, jet aircraft.
http://linked.open...UplatneniVysledku	2008
http://linked.open...v/svazekPeriodika	32
http://linked.open...iv/tvurceVysledku	Hanzálek, Zdeněk Krákora, Jan
http://linked.open...ain/vavai/riv/wos	000261457100004
http://linked.open...n/vavai/riv/zamer	Decision Making and Control for Manufacturing III
issn	0141-9331
number of pages	13 (xsd:int)
http://localhost/t...ganizacniJednotka	21230

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