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Description
  • Presentuje backtrace modely implementované v hardwaru a simulaci jednoho z nich. Oba tyto modely provádijí odvozování vstupního vektoru jakékoliv eásti kombinaeního obvodu na základi znalosti výstupního vektoru a omezujících podmínek. Jsou zde uvedeny dva odli1né modely slou3ící jako backtrace jednotky. Modely na úrovni popisu chování byly zapsány v jazyku VHDL. (cs)
  • The backtrace models implemented in hardware and simulation of one of them are presented. These models perform input vector derivation of any combinational circuit part on the basis of the output vector knowledge and constraints. In this paper we introduce two different models serving as backtrace units. The behavioural models have been described in the language VHDL.
  • The backtrace models implemented in hardware and simulation of one of them are presented. These models perform input vector derivation of any combinational circuit part on the basis of the output vector knowledge and constraints. In this paper we introduce two different models serving as backtrace units. The behavioural models have been described in the language VHDL. (en)
Title
  • A Structure Model for Input Vector Determination of Combinational Circuits and Its Simulation
  • A Structure Model for Input Vector Determination of Combinational Circuits and Its Simulation (en)
  • Model struktury pro odvozování vstupních vektoru kombinaeních obvodu a jeho simulace (cs)
skos:prefLabel
  • A Structure Model for Input Vector Determination of Combinational Circuits and Its Simulation
  • A Structure Model for Input Vector Determination of Combinational Circuits and Its Simulation (en)
  • Model struktury pro odvozování vstupních vektoru kombinaeních obvodu a jeho simulace (cs)
skos:notation
  • RIV/68407700:21230/06:03119426!RIV07-GA0-21230___
http://linked.open.../vavai/riv/strany
  • 51 ; 57
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/04/2137), Z(MSM6840770014)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 463847
http://linked.open...ai/riv/idVysledku
  • RIV/68407700:21230/06:03119426
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • backtrace; digital circuit; hardware; modelling; simulation (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [D2C69364102B]
http://linked.open...v/mistoKonaniAkce
  • Poerov
http://linked.open...i/riv/mistoVydani
  • Ostrava
http://linked.open...i/riv/nazevZdroje
  • Proceedings of 40th Spring International Conference MOSIS 06, Modelling and Simulation of Systems
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Novák, Ondřej
  • Šťáva, Martin
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • MARQ
https://schema.org/isbn
  • 80-86840-21-2
http://localhost/t...ganizacniJednotka
  • 21230
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