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Description
  • Elánek presentuje simulaci navr3ené architektury pro zpitné odvozování vstupních vektoru pomocí HW. Je zde proveden rozbor poíkladu jednoduchého kombinaeního obvodu a odpovídajícího zpitni-odvozujícího obvodu. Simulaení proces tohoto poíkladu pro nikolik výstupních vektoru je rovni3 uveden. Dále jsou vypoeteny toi ukazatele ureující kvalitu backtrace algoritmu implementovaného v HW. (cs)
  • This paper presents simulation of the proposed architecture for backward determination of input vectors by HW. An example of a simple combinational circuit and a corresponding backward-determining circuit is completely analysed there. A simulation process of this example for some output vectors is stated as well. At the end of the paper, there are calculated three indicators showing the quality of the backtrace algorithm implemented in HW.
  • This paper presents simulation of the proposed architecture for backward determination of input vectors by HW. An example of a simple combinational circuit and a corresponding backward-determining circuit is completely analysed there. A simulation process of this example for some output vectors is stated as well. At the end of the paper, there are calculated three indicators showing the quality of the backtrace algorithm implemented in HW. (en)
Title
  • An Illustrative Case Study of Backward Determination of Input Vectors by HW
  • An Illustrative Case Study of Backward Determination of Input Vectors by HW (en)
  • Ilustrativní poípadová studie zpitného odvozování vstupních vektoru pomocí HW (cs)
skos:prefLabel
  • An Illustrative Case Study of Backward Determination of Input Vectors by HW
  • An Illustrative Case Study of Backward Determination of Input Vectors by HW (en)
  • Ilustrativní poípadová studie zpitného odvozování vstupních vektoru pomocí HW (cs)
skos:notation
  • RIV/68407700:21230/06:03119425!RIV07-GA0-21230___
http://linked.open.../vavai/riv/strany
  • 253 ; 258
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/04/2137), Z(MSM6840770014)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 464809
http://linked.open...ai/riv/idVysledku
  • RIV/68407700:21230/06:03119425
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • backtrace; backward determination; digital circuit; hardware; simulation; vectors generation (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [16896EF89FB3]
http://linked.open...v/mistoKonaniAkce
  • Poerov
http://linked.open...i/riv/mistoVydani
  • Ostrava
http://linked.open...i/riv/nazevZdroje
  • Proceedings of 40th Spring International Conference MOSIS 06, Modelling and Simulation of Systems
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Novák, Ondřej
  • Šťáva, Martin
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • MARQ
https://schema.org/isbn
  • 80-86840-21-2
http://localhost/t...ganizacniJednotka
  • 21230
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