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Description
  • Není k dispozici (cs)
  • This paper shows that a non-deterministic system modeled by Petri-nets (analyzed and simulated by professional software tools, e.g. Design/CPN, JARP, before its hardware implementation) can be successfully hardware implemented (here in an FPGA). We have concentrated to the models with really concurrent actions, with different types of dependencies (mutual exclusion, parallel, scheduled) and their direct hardware implementation. Our Petri-nets model need not be equivalent to a FSM, it means that our Petri-net model can non-deterministically choose a transition to be fired from several enabled ones.
  • This paper shows that a non-deterministic system modeled by Petri-nets (analyzed and simulated by professional software tools, e.g. Design/CPN, JARP, before its hardware implementation) can be successfully hardware implemented (here in an FPGA). We have concentrated to the models with really concurrent actions, with different types of dependencies (mutual exclusion, parallel, scheduled) and their direct hardware implementation. Our Petri-nets model need not be equivalent to a FSM, it means that our Petri-net model can non-deterministically choose a transition to be fired from several enabled ones. (en)
Title
  • Není k dispozici (cs)
  • Direct Implementation of Petri Net Based model in FPGA
  • Direct Implementation of Petri Net Based model in FPGA (en)
skos:prefLabel
  • Není k dispozici (cs)
  • Direct Implementation of Petri Net Based model in FPGA
  • Direct Implementation of Petri Net Based model in FPGA (en)
skos:notation
  • RIV/68407700:21230/04:03099874!RIV/2005/GA0/212305/N
http://linked.open.../vavai/riv/strany
  • 31 ; 36
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/04/0737), Z(MSM 212300014)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 560713
http://linked.open...ai/riv/idVysledku
  • RIV/68407700:21230/04:03099874
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • Petri-nets, Field Programmable Gate Arrays (FPGAs), modeling, simulation, design methodology, non-de (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [BD41AF9AEE62]
http://linked.open...v/mistoKonaniAkce
  • Dychow
http://linked.open...i/riv/mistoVydani
  • Zielona Gora
http://linked.open...i/riv/nazevZdroje
  • Proceedings of the International Workshop on Discrete-Event System Design - DESDes'04
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Kubátová, Hana
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • University of Zielona Gora
https://schema.org/isbn
  • 83-89712-15-6
http://localhost/t...ganizacniJednotka
  • 21230
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