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Description
  • SMECY project is an ambitious European initiative involving 29 partners across 9 countries to enable Europe to have a leader role in multi-core domain by developing new programming technologies enabling the exploitation of architectures offering hundreds of cores. Multi-core technologies will rapidly provide to the parallel computing field improved performance, energy saving and cost reduction and will become of strategic value in winning market share in all areas of embedded systems. Given the need, SMECY lays the focus on targeting programming multi-core architecture for consumer electronics with efficient resources management. The first presentation describes the overall project while the two others are respectively dedicated to the multi-core platforms targeted in the project and the description of the tools constituting the bricks of the tool chains.
  • SMECY project is an ambitious European initiative involving 29 partners across 9 countries to enable Europe to have a leader role in multi-core domain by developing new programming technologies enabling the exploitation of architectures offering hundreds of cores. Multi-core technologies will rapidly provide to the parallel computing field improved performance, energy saving and cost reduction and will become of strategic value in winning market share in all areas of embedded systems. Given the need, SMECY lays the focus on targeting programming multi-core architecture for consumer electronics with efficient resources management. The first presentation describes the overall project while the two others are respectively dedicated to the multi-core platforms targeted in the project and the description of the tools constituting the bricks of the tool chains. (en)
Title
  • SMECY: Smarti Multi-core Embedded SYstems (Special Session)
  • SMECY: Smarti Multi-core Embedded SYstems (Special Session) (en)
skos:prefLabel
  • SMECY: Smarti Multi-core Embedded SYstems (Special Session)
  • SMECY: Smarti Multi-core Embedded SYstems (Special Session) (en)
skos:notation
  • RIV/67985556:_____/11:00360749!RIV12-AV0-67985556
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(7H10001), Z(AV0Z10750506)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 230003
http://linked.open...ai/riv/idVysledku
  • RIV/67985556:_____/11:00360749
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • embedded systems; multi-core systems (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [F0EC88652B86]
http://linked.open...v/mistoKonaniAkce
  • Lausanne
http://linked.open...i/riv/mistoVydani
  • Lausanne
http://linked.open...i/riv/nazevZdroje
  • Proceedings of 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Daněk, Martin
  • Bertels, K.
  • Pacull, F.
  • Urlini, G.
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • ACM Press
https://schema.org/isbn
  • 978-1-4503-0667-6
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