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Description
  • This paper describes instruction set extensions for a variant of multi-threading called micro-threading for the LEON3 SPARCv8 processor. We show an architecture of the developed processor and its key blocks - cache controller, register file, thread scheduler. The processor has been implemented in a Xilinx Virtex2Pro FPGA. The extensions are evaluated in terms of extra resources needed, and the overall performance of the developed processor is evaluated on a simple DSP computation typical for embedded systems.
  • This paper describes instruction set extensions for a variant of multi-threading called micro-threading for the LEON3 SPARCv8 processor. We show an architecture of the developed processor and its key blocks - cache controller, register file, thread scheduler. The processor has been implemented in a Xilinx Virtex2Pro FPGA. The extensions are evaluated in terms of extra resources needed, and the overall performance of the developed processor is evaluated on a simple DSP computation typical for embedded systems. (en)
Title
  • Instruction Set Extensions for Multi-Threading in LEON3
  • Instruction Set Extensions for Multi-Threading in LEON3 (en)
skos:prefLabel
  • Instruction Set Extensions for Multi-Threading in LEON3
  • Instruction Set Extensions for Multi-Threading in LEON3 (en)
skos:notation
  • RIV/67985556:_____/10:00342262!RIV11-MSM-67985556
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(7E08013), Z(AV0Z10750506)
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  • 264225
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  • RIV/67985556:_____/10:00342262
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  • multithreading; instruction set extensions; microthreading; LEON3; SPARC; FPGA (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [1F20D2B4C424]
http://linked.open...v/mistoKonaniAkce
  • Vídeň
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  • Los Alamitos
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  • Proceedings of the13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems
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  • Daněk, Martin
  • Kafka, Leoš
  • Kohout, Lukáš
  • Sýkora, Jaroslav
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http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
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  • IEEE
https://schema.org/isbn
  • 978-1-4244-6610-8
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