About: Configuration System for a DSP/FPGA-Based Embedded Accelerator     Goto   Sponge   NotDistinct   Permalink

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Description
  • Článek se zabývá konfiguračním procesorem pro vestavný DSP/FPGA akcelerátor. Konfigurační procesor zjednodušuje, při použití předpřipravených funkčních bloků, konfiguraci akcelerátoru. Článek se zaměřuje především na parser Simulinkových modelů, jehož účelem je generovat z těchto modelů skripty pro konfigurační procesor. (cs)
  • An embedded configuration engine for a DSP/FPGA based accelerator is considered. The engine is used to simplify configuration of the accelerator using ready-made functional blocks. A parser for Simulink models has been designed which generates scripts for the configuration engine as its output.
  • An embedded configuration engine for a DSP/FPGA based accelerator is considered. The engine is used to simplify configuration of the accelerator using ready-made functional blocks. A parser for Simulink models has been designed which generates scripts for the configuration engine as its output. (en)
Title
  • Configuration System for a DSP/FPGA-Based Embedded Accelerator
  • Configuration System for a DSP/FPGA-Based Embedded Accelerator (en)
  • Konfigurační systém pro vestavěný DSP/FPGA akcelerátor (cs)
skos:prefLabel
  • Configuration System for a DSP/FPGA-Based Embedded Accelerator
  • Configuration System for a DSP/FPGA-Based Embedded Accelerator (en)
  • Konfigurační systém pro vestavěný DSP/FPGA akcelerátor (cs)
skos:notation
  • RIV/67985556:_____/07:00098562!RIV08-AV0-67985556
http://linked.open.../vavai/riv/strany
  • 1;4
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(1ET400750408), Z(AV0Z10750506)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 414774
http://linked.open...ai/riv/idVysledku
  • RIV/67985556:_____/07:00098562
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • video-processing; FPGA; accelerator; configuration; Simulink (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [0FDAE4F18542]
http://linked.open...v/mistoKonaniAkce
  • Žilina
http://linked.open...i/riv/mistoVydani
  • Žilina
http://linked.open...i/riv/nazevZdroje
  • Digital Technologies 2007 Proceedings
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Kovář, Bohumil
  • Schier, Jan
  • Zuzaňák, J.
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • Slovenská elektrotechnická spoločnosť
https://schema.org/isbn
  • 978-80-8070-786-6
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