About: Dynamic reconfoguration of FPGAs: a case study.

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	This paper discusses dynamic reconfiguration achievable using current FPGA methodology. An analysis of implementation issues has been presented and desirable features of future generation of CAD tools have been discussed. Several practical examples have been presented together with their implementation data. This paper discusses dynamic reconfiguration achievable using current FPGA methodology. An analysis of implementation issues has been presented and desirable features of future generation of CAD tools have been discussed. Several practical examples have been presented together with their implementation data. (en)
Title	Dynamic reconfoguration of FPGAs: a case study. Dynamic reconfoguration of FPGAs: a case study. (en)
skos:prefLabel	Dynamic reconfoguration of FPGAs: a case study. Dynamic reconfoguration of FPGAs: a case study. (en)
skos:notation	RIV/67985556:_____/03:16030185!RIV/2004/AV0/A16004/N
http://linked.open.../vavai/riv/strany	17;23
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(LN00B096), Z(AV0Z1075907)
http://linked.open...vai/riv/dodaniDat	2004
http://linked.open...aciTvurceVysledku	Matoušek, Rudolf
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Ústav teorie informace a automatizace AV ČR, v. v. i.
http://linked.open...dnocenehoVysledku	604662
http://linked.open...ai/riv/idVysledku	RIV/67985556:_____/03:16030185
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	dynamic reconfiguration; FPGA; reconfiguration cycle (en)
http://linked.open.../riv/klicoveSlovo	dynamic reconfiguration FPGA reconfiguration cycle
http://linked.open...ontrolniKodProRIV	[E7890B16947D]
http://linked.open...v/mistoKonaniAkce	Zvíkovské Podhradí [CZ]
http://linked.open...i/riv/mistoVydani	Brno
http://linked.open...i/riv/nazevZdroje	Počítačové Architektury & Diagnostika PAD 2003.
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	1 (xsd:int)
http://linked.open...cetTvurcuVysledku	1 (xsd:int)
http://linked.open...ocetUcastnikuAkce	0 (xsd:int)
http://linked.open...nichUcastnikuAkce	0 (xsd:int)
http://linked.open...vavai/riv/projekt	Center for Applied Cybernetics
http://linked.open...UplatneniVysledku	2003
http://linked.open...iv/tvurceVysledku	Matoušek, Rudolf
http://linked.open...vavai/riv/typAkce	CST - Celostátní
http://linked.open.../riv/zahajeniAkce	2003-09-24 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Uncertainty methods in theoretical cybernetics: system identification, information processing, decision-making, and control
number of pages	7 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Vysoké učení technické v Brně
https://schema.org/isbn	80-214-2471-0

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