Rapid prototyping for FPGAs using high-level environment of MATLAB/Simulink is addressed in this paper. An approach using combination of the Xilinx System Generator (XSG) and Handel-C is given. A design flow to minimize HDL coding is considered.
Rapid prototyping for FPGAs using high-level environment of MATLAB/Simulink is addressed in this paper. An approach using combination of the Xilinx System Generator (XSG) and Handel-C is given. A design flow to minimize HDL coding is considered. (en)