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rdf:type
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Description
| - The LNS implementation of the LRLS algorithms in a FPGA offers better speed than C30/C40 DSP floating-point and provides low-cost, efficient solution for different system-on-chip applications. The resulting RLS Lattice cores operate with 24-bit precision fixed-point input/output signals. Therefore, the internal conversion to the log domain and the internal LNS operation can be hidden from the user. This presented work provides significant speedup without any loss of precision.
- The LNS implementation of the LRLS algorithms in a FPGA offers better speed than C30/C40 DSP floating-point and provides low-cost, efficient solution for different system-on-chip applications. The resulting RLS Lattice cores operate with 24-bit precision fixed-point input/output signals. Therefore, the internal conversion to the log domain and the internal LNS operation can be hidden from the user. This presented work provides significant speedup without any loss of precision. (en)
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Title
| - Implementation of (Normalised) RLS Lattice on Virtex.
- Implementation of (Normalised) RLS Lattice on Virtex. (en)
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skos:prefLabel
| - Implementation of (Normalised) RLS Lattice on Virtex.
- Implementation of (Normalised) RLS Lattice on Virtex. (en)
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skos:notation
| - RIV/67985556:_____/01:16010111!RIV/2003/AV0/A16003/N
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http://linked.open.../vavai/riv/strany
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/67985556:_____/01:16010111
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
| - field programmable gate array (en)
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...v/mistoKonaniAkce
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http://linked.open...i/riv/mistoVydani
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http://linked.open...i/riv/nazevZdroje
| - Field-Programmable Logic and Applications. Proceedings.
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...ocetUcastnikuAkce
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http://linked.open...nichUcastnikuAkce
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http://linked.open...UplatneniVysledku
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http://linked.open...iv/tvurceVysledku
| - Kadlec, Jiří
- Heřmánek, Antonín
- Matoušek, Rudolf
- Coleman, J. N.
- Albu, F.
- Fagan, A.
- Softley, Ch.
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http://linked.open...vavai/riv/typAkce
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http://linked.open.../riv/zahajeniAkce
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http://linked.open...n/vavai/riv/zamer
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number of pages
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http://purl.org/ne...btex#hasPublisher
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https://schema.org/isbn
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