About: Reducing memory in high-speed packet classification

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Many packet classification algorithms were proposed to deal with the rapidly growing speed of computer networks. Unfortunately all of these algorithms are able to achieve high throughput only at the cost of excessively large memory and can be used only for small sets of rules. We propose new algorithm that uses four techniques to lower the memory requirements: division of rule set into subsets,removal of critical rules,prefix coloring and perfect hashing. The algorithm is designed for pipelined hardware implementation,can achieve the throughput of 266 million packets per second,which corresponds to 178 Gb/s for the shortest 64B packets,and outperforms older approaches in terms of memory requirements by 66 % in average for the rule sets available to us. Many packet classification algorithms were proposed to deal with the rapidly growing speed of computer networks. Unfortunately all of these algorithms are able to achieve high throughput only at the cost of excessively large memory and can be used only for small sets of rules. We propose new algorithm that uses four techniques to lower the memory requirements: division of rule set into subsets,removal of critical rules,prefix coloring and perfect hashing. The algorithm is designed for pipelined hardware implementation,can achieve the throughput of 266 million packets per second,which corresponds to 178 Gb/s for the shortest 64B packets,and outperforms older approaches in terms of memory requirements by 66 % in average for the rule sets available to us. (en)
Title	Reducing memory in high-speed packet classification Reducing memory in high-speed packet classification (en)
skos:prefLabel	Reducing memory in high-speed packet classification Reducing memory in high-speed packet classification (en)
skos:notation	RIV/63839172:_____/12:00007356!RIV13-MSM-63839172
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(LM2010005)
http://linked.open...vai/riv/dodaniDat	2013
http://linked.open...aciTvurceVysledku	Kořenek, Jan Puš, Viktor
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	CESNET - zájmové sdružení právnických osob
http://linked.open...dnocenehoVysledku	164485
http://linked.open...ai/riv/idVysledku	RIV/63839172:_____/12:00007356
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	classification; parallelism; hardware; SRAM; FPGA (en)
http://linked.open.../riv/klicoveSlovo	FPGA classification parallelism SRAM hardware
http://linked.open...ontrolniKodProRIV	[F1D77E4770BD]
http://linked.open...v/mistoKonaniAkce	Limassol, Kypr
http://linked.open...i/riv/mistoVydani	Limassol
http://linked.open...i/riv/nazevZdroje	Proceedings of the 8th International Wireless Communications and Mobile Computing Conference
http://linked.open...in/vavai/riv/obor	IN
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...vavai/riv/projekt	Large Infrastructure CESNET
http://linked.open...UplatneniVysledku	2012
http://linked.open...iv/tvurceVysledku	Kořenek, Jan Puš, Viktor
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open...ain/vavai/riv/wos	000312146500072
http://linked.open.../riv/zahajeniAkce	2012-08-27 (xsd:date)
number of pages	6 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Institute of Electrical and Electronics Engineers ( IEEE )
https://schema.org/isbn	978-1-4577-1379-8

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