About: High performance polyphase FIR filter structures in VHDL language for Software Defined Radio based on FPGA

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About: High performance polyphase FIR filter structures in VHDL language for Software Defined Radio based on FPGA Goto Sponge NotDistinct Permalink

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Digital filters are necessary in digital transmitter / receiver side and popularity of Software Defined Radio (SDR) is forcing complex digital signal processing blocks to be implemented in parallel design flow on FPGA or ASIC. The goal of this paper is to develop efficient pipelined polyphase FIR filter structures in VHDL language for RTL synthesis on FPGA. The proposed structures contain fully parallel polyphase decimation and interpolation FIR filter models. The first part of this paper is focused on formulation of distributed arithmetic technique with polyphase decomposition, which represents the core of designed models. The second part describes mentioned polyphase FIR VHDL models. The extensive emphasis will be put on efficient pipelined implementation with excellent registered performance and optimal design size balance. The third part of this paper deals with rapid design and simulation of proposed VHDL models. The result of RTL synthesis is finally discussed. Very good performance and optimal design size are main benefits of proposed polyphase FIR filters. Developed structures are very suitable for multichannel operation in digital I/Q receiver. Digital filters are necessary in digital transmitter / receiver side and popularity of Software Defined Radio (SDR) is forcing complex digital signal processing blocks to be implemented in parallel design flow on FPGA or ASIC. The goal of this paper is to develop efficient pipelined polyphase FIR filter structures in VHDL language for RTL synthesis on FPGA. The proposed structures contain fully parallel polyphase decimation and interpolation FIR filter models. The first part of this paper is focused on formulation of distributed arithmetic technique with polyphase decomposition, which represents the core of designed models. The second part describes mentioned polyphase FIR VHDL models. The extensive emphasis will be put on efficient pipelined implementation with excellent registered performance and optimal design size balance. The third part of this paper deals with rapid design and simulation of proposed VHDL models. The result of RTL synthesis is finally discussed. Very good performance and optimal design size are main benefits of proposed polyphase FIR filters. Developed structures are very suitable for multichannel operation in digital I/Q receiver. (en)
Title	High performance polyphase FIR filter structures in VHDL language for Software Defined Radio based on FPGA High performance polyphase FIR filter structures in VHDL language for Software Defined Radio based on FPGA (en)
skos:prefLabel	High performance polyphase FIR filter structures in VHDL language for Software Defined Radio based on FPGA High performance polyphase FIR filter structures in VHDL language for Software Defined Radio based on FPGA (en)
skos:notation	RIV/49777513:23220/14:43923594!RIV15-MSM-23220___
http://linked.open...avai/riv/aktivita	S
http://linked.open...avai/riv/aktivity	S
http://linked.open...vai/riv/dodaniDat	2015
http://linked.open...aciTvurceVysledku	Fiala, Pavel Linhart, Richard
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Západočeská univerzita v Plzni / Fakulta elektrotechnická
http://linked.open...dnocenehoVysledku	19074
http://linked.open...ai/riv/idVysledku	RIV/49777513:23220/14:43923594
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	VHDL; polyphase; signal; SDR; FPGA; FIR filters; digital signal processing (en)
http://linked.open.../riv/klicoveSlovo	polyphase VHDL SDR FIR filters FPGA digital signal processing signal
http://linked.open...ontrolniKodProRIV	[F56FBB3F3940]
http://linked.open...v/mistoKonaniAkce	Plzeň
http://linked.open...i/riv/mistoVydani	Plzeň
http://linked.open...i/riv/nazevZdroje	2014 International Conference on Applied Electronics
http://linked.open...in/vavai/riv/obor	JA
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...UplatneniVysledku	2014
http://linked.open...iv/tvurceVysledku	Fiala, Pavel Linhart, Richard
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2014-09-09 (xsd:date)
issn	1803-7232
number of pages	4 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Západočeská univerzita v Plzni
https://schema.org/isbn	978-80-261-0276-2
http://localhost/t...ganizacniJednotka	23220

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