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  • Při realizaci algoritmů jsou operace sčítání a násobení v FPGA obvodech nejčastější používanou operací. Příspěvek se zabývá těmito dvěma operacemi a jejich využitím v integrovaných obvodech.Porovnává vliv popisu struktury jednotlivých operací v FPGA obvodech. Přičemž se zabývá zpožděním těchto struktur, na které jsou kladeny velké nároky.Příspěvek ukazuje závislosti výpočtu na přesnosti a počtu bitů jednotlivých operandů. V neposlední řadě se zabývá velikostí zabrané plochy jednotlivými operacemi. Na závěr je uvedena úvaha pro jejich použití. (cs)
  • During implementation of algorithms the operations of addition and multiplication are the most frequently used operations in FPGA circuits. This paper is dealing with these two operations and their utilization in integrated circuits.It compares the influence of description of structure of individual operations in FPGA circuits. Great demands are set on delaying these structures. It shows dependencies of calculation on accuracy and number of bits of individual operands.Last but not least this paper deals with the size of occupied area of individual operations. Consideration for their use is stated in conclusion.
  • During implementation of algorithms the operations of addition and multiplication are the most frequently used operations in FPGA circuits. This paper is dealing with these two operations and their utilization in integrated circuits.It compares the influence of description of structure of individual operations in FPGA circuits. Great demands are set on delaying these structures. It shows dependencies of calculation on accuracy and number of bits of individual operands.Last but not least this paper deals with the size of occupied area of individual operations. Consideration for their use is stated in conclusion. (en)
Title
  • Matematické operace v FPGA obvodech (cs)
  • Mathematical operations in FPGA circuits
  • Mathematical operations in FPGA circuits (en)
skos:prefLabel
  • Matematické operace v FPGA obvodech (cs)
  • Mathematical operations in FPGA circuits
  • Mathematical operations in FPGA circuits (en)
skos:notation
  • RIV/46747885:24220/04:00000114!RIV/2005/GA0/242205/N
http://linked.open.../vavai/riv/strany
  • 5-10
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/04/2137), Z(MSM 242200002)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 572518
http://linked.open...ai/riv/idVysledku
  • RIV/46747885:24220/04:00000114
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • %22binary arithmetic operations;hardware implementation;programmable gate array;addition;multiplication%22 (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [BCC30B7A44B4]
http://linked.open...v/mistoKonaniAkce
  • Žilina, Slovenská republika
http://linked.open...i/riv/mistoVydani
  • Žilina, Slovenská republika
http://linked.open...i/riv/nazevZdroje
  • International Workshop Digital Technologies
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Došek, Petr
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • Neuveden
https://schema.org/isbn
  • 80-8070-334-5
http://localhost/t...ganizacniJednotka
  • 24220
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