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  • Nowadays there can be evidently identified several important application fields, such as evolvable hardware, fault-tolerant architectures or circuit development, where the exploitation of partial reconfiguration principles may bring significant benefits. For conventional digital designs, a wide range of solutions comprising fine- to coarse-grained architectures are available on the market or e.g. as virtual reconfigurable circuits. But for polymorphic digital circuits (polymorphic digital circuit is able to perform more than one function, it typically has one stable structure for all functions and an actually performed function depends on a state of an environment) only one small-scale solution has been reported so far - the REPOMO. In this paper, main attention is given to the proposal of an approach with increased flexibility, where the resulting capabilities are demonstrated.
  • Nowadays there can be evidently identified several important application fields, such as evolvable hardware, fault-tolerant architectures or circuit development, where the exploitation of partial reconfiguration principles may bring significant benefits. For conventional digital designs, a wide range of solutions comprising fine- to coarse-grained architectures are available on the market or e.g. as virtual reconfigurable circuits. But for polymorphic digital circuits (polymorphic digital circuit is able to perform more than one function, it typically has one stable structure for all functions and an actually performed function depends on a state of an environment) only one small-scale solution has been reported so far - the REPOMO. In this paper, main attention is given to the proposal of an approach with increased flexibility, where the resulting capabilities are demonstrated. (en)
Title
  • Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature
  • Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature (en)
skos:prefLabel
  • Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature
  • Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature (en)
skos:notation
  • RIV/00216305:26230/14:PU111981!RIV15-MSM-26230___
http://linked.open...avai/riv/aktivita
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  • P(ED1.1.00/02.0070), P(LD14055), S
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  • 41621
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  • RIV/00216305:26230/14:PU111981
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  • reconfigurable circuit, polymorphic electronics, partial reconfiguration (en)
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  • [60237831C53B]
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  • Pisa
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  • Pisa
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  • Proceedings on UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation
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  • Růžička, Richard
  • Šimek, Václav
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number of pages
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  • IEEE Computer Society
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  • 978-1-4799-7411-5
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  • 26230
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