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  • This paper describes one approach for verification of hardware systems called functional verification. Several challenges and problems connected with efficiency and speed of functional verification are identified and reflected in the goals of the Ph.D. thesis. The first goal deals with creation of a complete coverage model of the verified system depending on the measurable attributes of a circuit. The second one aims at finding new methods how to check specific values of such attributes as fast as possible and to increase the overall efficiency of functional verification.
  • This paper describes one approach for verification of hardware systems called functional verification. Several challenges and problems connected with efficiency and speed of functional verification are identified and reflected in the goals of the Ph.D. thesis. The first goal deals with creation of a complete coverage model of the verified system depending on the measurable attributes of a circuit. The second one aims at finding new methods how to check specific values of such attributes as fast as possible and to increase the overall efficiency of functional verification. (en)
Title
  • New Methods for Increasing Efficiency and Speed of Functional Verification
  • New Methods for Increasing Efficiency and Speed of Functional Verification (en)
skos:prefLabel
  • New Methods for Increasing Efficiency and Speed of Functional Verification
  • New Methods for Increasing Efficiency and Speed of Functional Verification (en)
skos:notation
  • RIV/00216305:26230/13:PU106451!RIV14-MSM-26230___
http://linked.open...avai/riv/aktivita
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  • P(ED1.1.00/02.0070), P(LD12036), S, Z(MSM0021630528)
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  • Šimková, Marcela
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  • 91624
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  • RIV/00216305:26230/13:PU106451
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  • Functional Verification, Optimization, Acceleration (en)
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  • [640A2770095B]
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  • Teplá
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  • Plzeň
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  • Počítačové architektury a diagnostika PAD 2013
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  • Šimková, Marcela
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number of pages
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  • Západočeská univerzita v Plzni
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  • 978-80-261-0270-0
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  • 26230
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